radeon/audio: enable DP audio

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Slava Grigorev <slava.grigorev@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/radeon/atombios_encoders.c b/drivers/gpu/drm/radeon/atombios_encoders.c
index 8ca8b4fcb10cb38b62c7e30e69d74ca4f8b02560..7c9df1eac065948df99491b3819427e32ad425d7 100644 (file)
--- a/drivers/gpu/drm/radeon/atombios_encoders.c
+++ b/drivers/gpu/drm/radeon/atombios_encoders.c
@@ -665,6 +665,8 @@ atombios_digital_setup(struct drm_encoder *encoder, int action)
 int
 atombios_get_encoder_mode(struct drm_encoder *encoder)
 {
+       struct drm_device *dev = encoder->dev;
+       struct radeon_device *rdev = dev->dev_private;
        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
        struct drm_connector *connector;
        struct radeon_connector *radeon_connector;
@@ -729,6 +731,8 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
                dig_connector = radeon_connector->con_priv;
                if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
                    (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) {
+                       if (radeon_audio != 0 && ASIC_IS_DCE4(rdev) && !ASIC_IS_DCE5(rdev))
+                               return ATOM_ENCODER_MODE_DP_AUDIO;
                        return ATOM_ENCODER_MODE_DP;
                } else if (radeon_audio != 0) {
                        if (radeon_connector->audio == RADEON_AUDIO_ENABLE)
@@ -743,6 +747,8 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
                }
                break;
        case DRM_MODE_CONNECTOR_eDP:
+               if (radeon_audio != 0 && ASIC_IS_DCE4(rdev) && !ASIC_IS_DCE5(rdev))
+                       return ATOM_ENCODER_MODE_DP_AUDIO;
                return ATOM_ENCODER_MODE_DP;
        case DRM_MODE_CONNECTOR_DVIA:
        case DRM_MODE_CONNECTOR_VGA:

diff --git a/drivers/gpu/drm/radeon/dce6_afmt.c b/drivers/gpu/drm/radeon/dce6_afmt.c
index 1c870060c29b7bd7552c12a76c0678990e91f64c..192c8038915187df6714fbd6d653f57dba449c13 100644 (file)
--- a/drivers/gpu/drm/radeon/dce6_afmt.c
+++ b/drivers/gpu/drm/radeon/dce6_afmt.c
@@ -287,3 +287,38 @@ void dce6_dp_audio_set_dto(struct radeon_device *rdev,
     WREG32(DCCG_AUDIO_DTO1_PHASE, 24000);
     WREG32(DCCG_AUDIO_DTO1_MODULE, clock);
 }
+
+void dce6_enable_dp_audio_packets(struct drm_encoder *encoder, bool enable)
+{
+       struct drm_device *dev = encoder->dev;
+       struct radeon_device *rdev = dev->dev_private;
+       struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+       struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
+       uint32_t offset;
+
+       if (!dig || !dig->afmt)
+               return;
+
+       offset = dig->afmt->offset;
+
+       if (enable) {
+        if (dig->afmt->enabled)
+            return;
+
+               WREG32(EVERGREEN_DP_SEC_TIMESTAMP + offset, EVERGREEN_DP_SEC_TIMESTAMP_MODE(1));
+               WREG32(EVERGREEN_DP_SEC_CNTL + offset,
+                       EVERGREEN_DP_SEC_ASP_ENABLE |           /* Audio packet transmission */
+                       EVERGREEN_DP_SEC_ATP_ENABLE |           /* Audio timestamp packet transmission */
+                       EVERGREEN_DP_SEC_AIP_ENABLE |           /* Audio infoframe packet transmission */
+                       EVERGREEN_DP_SEC_STREAM_ENABLE);        /* Master enable for secondary stream engine */
+               radeon_audio_enable(rdev, dig->afmt->pin, true);
+       } else {
+               if (!dig->afmt->enabled)
+                       return;
+
+               WREG32(EVERGREEN_DP_SEC_CNTL + offset, 0);
+               radeon_audio_enable(rdev, dig->afmt->pin, false);
+       }
+
+       dig->afmt->enabled = enable;
+}

diff --git a/drivers/gpu/drm/radeon/evergreen_hdmi.c b/drivers/gpu/drm/radeon/evergreen_hdmi.c
index c893fe1f0685878d9f10b14f6899358d98072ca1..1d9aebc79595d050dd52d6e28da01939b908bc16 100644 (file)
--- a/drivers/gpu/drm/radeon/evergreen_hdmi.c
+++ b/drivers/gpu/drm/radeon/evergreen_hdmi.c
@@ -424,3 +424,57 @@ void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable)
        DRM_DEBUG("%sabling HDMI interface @ 0x%04X for encoder 0x%x\n",
                  enable ? "En" : "Dis", dig->afmt->offset, radeon_encoder->encoder_id);
 }
+
+void evergreen_enable_dp_audio_packets(struct drm_encoder *encoder, bool enable)
+{
+       struct drm_device *dev = encoder->dev;
+       struct radeon_device *rdev = dev->dev_private;
+       struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+       struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
+       uint32_t offset;
+
+       if (!dig || !dig->afmt)
+               return;
+
+       offset = dig->afmt->offset;
+
+       if (enable) {
+               struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
+               struct radeon_connector *radeon_connector = to_radeon_connector(connector);
+               struct radeon_connector_atom_dig *dig_connector;
+               uint32_t val;
+
+               if (dig->afmt->enabled)
+                       return;
+
+               WREG32(EVERGREEN_DP_SEC_TIMESTAMP + offset, EVERGREEN_DP_SEC_TIMESTAMP_MODE(1));
+
+               if (radeon_connector->con_priv) {
+                       dig_connector = radeon_connector->con_priv;
+                       val = RREG32(EVERGREEN_DP_SEC_AUD_N + offset);
+                       val &= ~EVERGREEN_DP_SEC_N_BASE_MULTIPLE(0xf);
+
+                       if (dig_connector->dp_clock == 162000)
+                               val |= EVERGREEN_DP_SEC_N_BASE_MULTIPLE(3);
+                       else
+                               val |= EVERGREEN_DP_SEC_N_BASE_MULTIPLE(5);
+
+                       WREG32(EVERGREEN_DP_SEC_AUD_N + offset, val);
+               }
+
+               WREG32(EVERGREEN_DP_SEC_CNTL + offset,
+                       EVERGREEN_DP_SEC_ASP_ENABLE |           /* Audio packet transmission */
+                       EVERGREEN_DP_SEC_ATP_ENABLE |           /* Audio timestamp packet transmission */
+                       EVERGREEN_DP_SEC_AIP_ENABLE |           /* Audio infoframe packet transmission */
+                       EVERGREEN_DP_SEC_STREAM_ENABLE);        /* Master enable for secondary stream engine */
+               radeon_audio_enable(rdev, dig->afmt->pin, 0xf);
+       } else {
+               if (!dig->afmt->enabled)
+                       return;
+
+               WREG32(EVERGREEN_DP_SEC_CNTL + offset, 0);
+               radeon_audio_enable(rdev, dig->afmt->pin, 0);
+       }
+
+       dig->afmt->enabled = enable;
+}

diff --git a/drivers/gpu/drm/radeon/evergreen_reg.h b/drivers/gpu/drm/radeon/evergreen_reg.h
index 23bff590fb6e8057277bf55795915dfad9c6cb79..aa939dfed3a36586fc814f7077ef24332ab2b684 100644 (file)
--- a/drivers/gpu/drm/radeon/evergreen_reg.h
+++ b/drivers/gpu/drm/radeon/evergreen_reg.h
@@ -251,4 +251,19 @@
 /* HDMI blocks at 0x7030, 0x7c30, 0x10830, 0x11430, 0x12030, 0x12c30 */
 #define EVERGREEN_HDMI_BASE                            0x7030
 
+/* Display Port block */
+#define EVERGREEN_DP_SEC_CNTL                           0x7280
+#       define EVERGREEN_DP_SEC_STREAM_ENABLE           (1 << 0)
+#       define EVERGREEN_DP_SEC_ASP_ENABLE              (1 << 4)
+#       define EVERGREEN_DP_SEC_ATP_ENABLE              (1 << 8)
+#       define EVERGREEN_DP_SEC_AIP_ENABLE              (1 << 12)
+#       define EVERGREEN_DP_SEC_GSP_ENABLE              (1 << 20)
+#       define EVERGREEN_DP_SEC_AVI_ENABLE              (1 << 24)
+#       define EVERGREEN_DP_SEC_MPG_ENABLE              (1 << 28)
+#define EVERGREEN_DP_SEC_TIMESTAMP                      0x72a4
+#       define EVERGREEN_DP_SEC_TIMESTAMP_MODE(x)       (((x) & 0x3) << 0)
+#define EVERGREEN_DP_SEC_AUD_N                          0x7294
+#       define EVERGREEN_DP_SEC_N_BASE_MULTIPLE(x)      (((x) & 0xf) << 24)
+#       define EVERGREEN_DP_SEC_SS_EN                   (1 << 28)
+
 #endif

diff --git a/drivers/gpu/drm/radeon/radeon_audio.c b/drivers/gpu/drm/radeon/radeon_audio.c
index f1e22a857da94eed98c72e9d30ce8ba0a635cd85..192a614255e99e4677c1e78d86cd1fde0a187f1d 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_audio.c
+++ b/drivers/gpu/drm/radeon/radeon_audio.c
@@ -97,8 +97,12 @@ void dce3_2_set_mute(struct drm_encoder *encoder, u32 offset, bool mute);
 void dce4_set_mute(struct drm_encoder *encoder, u32 offset, bool mute);
 static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder,
        struct drm_display_mode *mode);
+static void radeon_audio_dp_mode_set(struct drm_encoder *encoder,
+       struct drm_display_mode *mode);
 void r600_hdmi_enable(struct drm_encoder *encoder, bool enable);
 void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable);
+void evergreen_enable_dp_audio_packets(struct drm_encoder *encoder, bool enable);
+void dce6_enable_dp_audio_packets(struct drm_encoder *encoder, bool enable);
 
 static const u32 pin_offsets[7] =
 {
@@ -178,6 +182,7 @@ static struct radeon_audio_funcs dce32_dp_funcs = {
        .write_speaker_allocation = dce3_2_afmt_dp_write_speaker_allocation,
        .set_dto = dce3_2_audio_set_dto,
        .set_avi_packet = r600_set_avi_packet,
+       .set_audio_packet = dce3_2_set_audio_packet,
 };
 
 static struct radeon_audio_funcs dce4_hdmi_funcs = {
@@ -203,6 +208,9 @@ static struct radeon_audio_funcs dce4_dp_funcs = {
        .write_latency_fields = dce4_afmt_write_latency_fields,
        .set_dto = dce4_dp_audio_set_dto,
        .set_avi_packet = evergreen_set_avi_packet,
+       .set_audio_packet = dce4_set_audio_packet,
+       .mode_set = radeon_audio_dp_mode_set,
+       .dpms = evergreen_enable_dp_audio_packets,
 };
 
 static struct radeon_audio_funcs dce6_hdmi_funcs = {
@@ -230,6 +238,9 @@ static struct radeon_audio_funcs dce6_dp_funcs = {
        .write_latency_fields = dce6_afmt_write_latency_fields,
        .set_dto = dce6_dp_audio_set_dto,
        .set_avi_packet = evergreen_set_avi_packet,
+       .set_audio_packet = dce4_set_audio_packet,
+       .mode_set = radeon_audio_dp_mode_set,
+       .dpms = dce6_enable_dp_audio_packets,
 };
 
 static void radeon_audio_interface_init(struct radeon_device *rdev)
@@ -711,6 +722,32 @@ static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder,
        radeon_audio_enable(rdev, dig->afmt->pin, 0xf);
 }
 
+static void radeon_audio_dp_mode_set(struct drm_encoder *encoder,
+       struct drm_display_mode *mode)
+{
+       struct drm_device *dev = encoder->dev;
+       struct radeon_device *rdev = dev->dev_private;
+       struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+       struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
+
+       if (!dig || !dig->afmt)
+               return;
+
+       /* disable audio prior to setting up hw */
+       dig->afmt->pin = radeon_audio_get_pin(encoder);
+       radeon_audio_enable(rdev, dig->afmt->pin, 0);
+
+       radeon_audio_set_dto(encoder, rdev->clock.default_dispclk * 10);
+       radeon_audio_set_audio_packet(encoder);
+       radeon_audio_select_pin(encoder);
+
+       if (radeon_audio_set_avi_packet(encoder, mode) < 0)
+               return;
+
+       /* enable audio after to setting up hw */
+       radeon_audio_enable(rdev, dig->afmt->pin, 0xf);
+}
+
 void radeon_audio_mode_set(struct drm_encoder *encoder,
        struct drm_display_mode *mode)
 {