ath9k_hw: Fix usec to hw clock conversion in 5Ghz for ar9003
authorVasanthakumar Thiagarajan <vasanth@atheros.com>
Mon, 26 Apr 2010 19:04:33 +0000 (15:04 -0400)
committerJohn W. Linville <linville@tuxdriver.com>
Tue, 27 Apr 2010 20:09:17 +0000 (16:09 -0400)
Fast clock operation (44Mhz) is enabled for 5Ghz in ar9003, so
take care of the conversion from usec to hw clock.

Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath9k/hw.c
drivers/net/wireless/ath/ath9k/hw.h

index 40b6e8415946d12dc4c7d2ca1c647568fd10f2e7..7bb700151ca6353dedbf545e59237cf7574341c7 100644 (file)
@@ -25,6 +25,7 @@
 #define ATH9K_CLOCK_RATE_CCK           22
 #define ATH9K_CLOCK_RATE_5GHZ_OFDM     40
 #define ATH9K_CLOCK_RATE_2GHZ_OFDM     44
+#define ATH9K_CLOCK_FAST_RATE_5GHZ_OFDM 44
 
 static bool ath9k_hw_set_reset_reg(struct ath_hw *ah, u32 type);
 
@@ -90,7 +91,11 @@ static u32 ath9k_hw_mac_clks(struct ath_hw *ah, u32 usecs)
                return usecs *ATH9K_CLOCK_RATE_CCK;
        if (conf->channel->band == IEEE80211_BAND_2GHZ)
                return usecs *ATH9K_CLOCK_RATE_2GHZ_OFDM;
-       return usecs *ATH9K_CLOCK_RATE_5GHZ_OFDM;
+
+       if (ah->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK)
+               return usecs * ATH9K_CLOCK_FAST_RATE_5GHZ_OFDM;
+       else
+               return usecs * ATH9K_CLOCK_RATE_5GHZ_OFDM;
 }
 
 static u32 ath9k_hw_mac_to_clks(struct ath_hw *ah, u32 usecs)
@@ -2188,7 +2193,8 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
        }
 
        if (AR_SREV_9300_20_OR_LATER(ah)) {
-               pCap->hw_caps |= ATH9K_HW_CAP_EDMA | ATH9K_HW_CAP_LDPC;
+               pCap->hw_caps |= ATH9K_HW_CAP_EDMA | ATH9K_HW_CAP_LDPC |
+                                ATH9K_HW_CAP_FASTCLOCK;
                pCap->rx_hp_qdepth = ATH9K_HW_RX_HP_QDEPTH;
                pCap->rx_lp_qdepth = ATH9K_HW_RX_LP_QDEPTH;
                pCap->rx_status_len = sizeof(struct ar9003_rxs);
index 6c84d318e31b91357d1757fe2929f5c6ef1fd7ea..7a1347b2453fe7c978ba1b2223aa58e546b842ab 100644 (file)
@@ -198,6 +198,7 @@ enum ath9k_hw_caps {
        ATH9K_HW_CAP_EDMA                       = BIT(17),
        ATH9K_HW_CAP_RAC_SUPPORTED              = BIT(18),
        ATH9K_HW_CAP_LDPC                       = BIT(19),
+       ATH9K_HW_CAP_FASTCLOCK                  = BIT(20),
 };
 
 enum ath9k_capability_type {