ARM: dts: omap3: Add DT entries for OMAP 3 ISP

The resources the ISP needs are slightly different on 3[45]xx and 3[67]xx.
Especially the phy-type property is different.

Signed-off-by: Sakari Ailus <sakari.ailus@iki.fi>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
[tony@atomide.com: use omap3_scm_general instead of scm_conf for now]
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/boot/dts/omap34xx.dtsi b/arch/arm/boot/dts/omap34xx.dtsi
index 3819c1e915915b2ad79395ce97323fbaa52ae439..7bc8c0f72ddb29c06ef9e31bd5897dcc865a46ab 100644 (file)
--- a/arch/arm/boot/dts/omap34xx.dtsi
+++ b/arch/arm/boot/dts/omap34xx.dtsi
@@ -8,6 +8,8 @@
  * kind, whether express or implied.
  */
 
+#include <dt-bindings/media/omap3-isp.h>
+
 #include "omap3.dtsi"
 
 / {
@@ -37,6 +39,21 @@
                        pinctrl-single,register-width = <16>;
                        pinctrl-single,function-mask = <0xff1f>;
                };
+
+               isp: isp@480bc000 {
+                       compatible = "ti,omap3-isp";
+                       reg = <0x480bc000 0x12fc
+                              0x480bd800 0x017c>;
+                       interrupts = <24>;
+                       iommus = <&mmu_isp>;
+                       syscon = <&omap3_scm_general 0xdc>;
+                       ti,phy-type = <OMAP3ISP_PHY_TYPE_COMPLEX_IO>;
+                       #clock-cells = <1>;
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                       };
+               };
        };
 };
 

diff --git a/arch/arm/boot/dts/omap36xx.dtsi b/arch/arm/boot/dts/omap36xx.dtsi
index 541704a59a5adcac655c7a23ea49123c6a4fe9de..3502fe00ec7d2713692c54ca85408952b36b0038 100644 (file)
--- a/arch/arm/boot/dts/omap36xx.dtsi
+++ b/arch/arm/boot/dts/omap36xx.dtsi
@@ -8,6 +8,8 @@
  * kind, whether express or implied.
  */
 
+#include <dt-bindings/media/omap3-isp.h>
+
 #include "omap3.dtsi"
 
 / {
@@ -69,6 +71,21 @@
                        pinctrl-single,register-width = <16>;
                        pinctrl-single,function-mask = <0xff1f>;
                };
+
+               isp: isp@480bc000 {
+                       compatible = "ti,omap3-isp";
+                       reg = <0x480bc000 0x12fc
+                              0x480bd800 0x0600>;
+                       interrupts = <24>;
+                       iommus = <&mmu_isp>;
+                       syscon = <&omap3_scm_general 0x2f0>;
+                       ti,phy-type = <OMAP3ISP_PHY_TYPE_CSIPHY>;
+                       #clock-cells = <1>;
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                       };
+               };
        };
 };