mlxsw: pci: Add some miscellaneous resources
authorNogah Frankel <nogahf@mellanox.com>
Tue, 20 Sep 2016 09:16:55 +0000 (11:16 +0200)
committerDavid S. Miller <davem@davemloft.net>
Wed, 21 Sep 2016 05:00:59 +0000 (01:00 -0400)
Add max system ports, max regions and max vlan groups to resource query.

Signed-off-by: Nogah Frankel <nogahf@mellanox.com>
Reviewed-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/mellanox/mlxsw/core.h
drivers/net/ethernet/mellanox/mlxsw/pci.c
drivers/net/ethernet/mellanox/mlxsw/spectrum.c

index e936dc9bdb9b6fab648b92dd39a9f5cd2cde2aed..097e56014c0cde6fb422d43b36f1e2e98efc8728 100644 (file)
@@ -267,13 +267,16 @@ struct mlxsw_driver {
 };
 
 struct mlxsw_resources {
-       u     max_span_valid:1,
+       u32     max_span_valid:1,
                max_lag_valid:1,
                max_ports_in_lag_valid:1,
                kvd_size_valid:1,
                kvd_single_min_size_valid:1,
                kvd_double_min_size_valid:1,
-               max_virtual_routers_valid:1;
+               max_virtual_routers_valid:1,
+               max_system_ports_valid:1,
+               max_vlan_groups_valid:1,
+               max_regions_valid:1;
        u8      max_span;
        u8      max_lag;
        u8      max_ports_in_lag;
@@ -281,6 +284,9 @@ struct mlxsw_resources {
        u32     kvd_single_min_size;
        u32     kvd_double_min_size;
        u16     max_virtual_routers;
+       u16     max_system_ports;
+       u16     max_vlan_groups;
+       u16     max_regions;
 
        /* Internal resources.
         * Determined by the SW, not queried from the HW.
index cb95f9a07200c9630c07d563341753bc83c04b22..826b5020c01aaa6443cbde1328bbffeef30f7ec6 100644 (file)
@@ -1162,6 +1162,9 @@ mlxsw_pci_config_profile_swid_config(struct mlxsw_pci *mlxsw_pci,
 #define MLXSW_KVD_SINGLE_MIN_SIZE_ID 0x1002
 #define MLXSW_KVD_DOUBLE_MIN_SIZE_ID 0x1003
 #define MLXSW_MAX_VIRTUAL_ROUTERS_ID 0x2C01
+#define MLXSW_MAX_SYSTEM_PORT_ID 0x2502
+#define MLXSW_MAX_VLAN_GROUPS_ID 0x2906
+#define MLXSW_MAX_REGIONS_ID 0x2901
 #define MLXSW_RESOURCES_QUERY_MAX_QUERIES 100
 #define MLXSW_RESOURCES_PER_QUERY 32
 
@@ -1197,6 +1200,18 @@ static void mlxsw_pci_resources_query_parse(int id, u64 val,
                resources->max_virtual_routers = val;
                resources->max_virtual_routers_valid = 1;
                break;
+       case MLXSW_MAX_SYSTEM_PORT_ID:
+               resources->max_system_ports = val;
+               resources->max_system_ports_valid = 1;
+               break;
+       case MLXSW_MAX_VLAN_GROUPS_ID:
+               resources->max_vlan_groups = val;
+               resources->max_vlan_groups_valid = 1;
+               break;
+       case MLXSW_MAX_REGIONS_ID:
+               resources->max_regions = val;
+               resources->max_regions_valid = 1;
+               break;
        default:
                break;
        }
index d8e3da2f0667d0770282afa1589fd85dae1d4434..9acc3e022543d5aee3df0475e38b9e712309da09 100644 (file)
@@ -3040,12 +3040,6 @@ static struct mlxsw_config_profile mlxsw_sp_config_profile = {
        .max_mid                        = MLXSW_SP_MID_MAX,
        .used_max_pgt                   = 1,
        .max_pgt                        = 0,
-       .used_max_system_port           = 1,
-       .max_system_port                = 64,
-       .used_max_vlan_groups           = 1,
-       .max_vlan_groups                = 127,
-       .used_max_regions               = 1,
-       .max_regions                    = 400,
        .used_flood_tables              = 1,
        .used_flood_mode                = 1,
        .flood_mode                     = 3,