spi: bcm2835: fill FIFO before enabling interrupts to reduce interrupts/message

To reduce the number of interrupts/message we fill the FIFO before
enabling interrupts - for short messages this reduces the interrupt count
from 2 to 1 interrupt.

There have been rare cases where short (<200ns) chip-select switches with
native CS have been observed during such operation, this is why this
optimization is only enabled for GPIO-CS.

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Tested-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/drivers/spi/spi-bcm2835.c b/drivers/spi/spi-bcm2835.c
index 2e6533e34b19f3b581861947dadf7890f138e433..08e5406c5029e3b8aa3afcf678fe2a36c17b1ed7 100644 (file)
--- a/drivers/spi/spi-bcm2835.c
+++ b/drivers/spi/spi-bcm2835.c
@@ -203,6 +203,22 @@ static int bcm2835_spi_transfer_one(struct spi_master *master,
        bs->tx_len = tfr->len;
        bs->rx_len = tfr->len;
 
+       /* fill in fifo if we have gpio-cs
+        * note that there have been rare events where the native-CS
+        * flapped for <1us which may change the behaviour
+        * with gpio-cs this does not happen, so it is implemented
+        * only for this case
+        */
+       if (gpio_is_valid(spi->cs_gpio)) {
+               /* enable HW block, but without interrupts enabled
+                * this would triggern an immediate interrupt
+                */
+               bcm2835_wr(bs, BCM2835_SPI_CS,
+                          cs | BCM2835_SPI_CS_TA);
+               /* fill in tx fifo as much as possible */
+               bcm2835_wr_fifo(bs);
+       }
+
        /*
         * Enable the HW block. This will immediately trigger a DONE (TX
         * empty) interrupt, upon which we will fill the TX FIFO with the