ARM: dts: meson: add USB support on Meson8 and Meson8b
authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Thu, 15 Jun 2017 21:33:50 +0000 (23:33 +0200)
committerKevin Hilman <khilman@baylibre.com>
Fri, 16 Jun 2017 19:07:11 +0000 (12:07 -0700)
This adds the DWC2 USB controller nodes and the corresponding USB2 PHY
nodes to meson.dtsi (as the same - or at least a very similar) IP block
is used on all SoCs (at the same physical address).
Additionally meson8.dtsi and meson8b.dtsi add the required clocks to the
DWC2 and USB2 PHY nodes, otherwise the DWC2 controller cannot be
initialized by the dwc2 driver.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
arch/arm/boot/dts/meson.dtsi
arch/arm/boot/dts/meson8.dtsi
arch/arm/boot/dts/meson8b.dtsi

index bf37606ba82ee7a73477f00d29cb6d133effcb72..15204e44161da6c98e8528488c8bf2be3a46ca6a 100644 (file)
                                status = "disabled";
                        };
 
+                       usb0_phy: phy@8800 {
+                               compatible = "amlogic,meson-mx-usb2-phy";
+                               #phy-cells = <0>;
+                               reg = <0x8800 0x20>;
+                               status = "disabled";
+                       };
+
+                       usb1_phy: phy@8820 {
+                               compatible = "amlogic,meson-mx-usb2-phy";
+                               #phy-cells = <0>;
+                               reg = <0x8820 0x20>;
+                               status = "disabled";
+                       };
+
                        spifc: spi@8c80 {
                                compatible = "amlogic,meson6-spifc";
                                reg = <0x8c80 0x80>;
                        };
                };
 
+               usb0: usb@c9040000 {
+                       compatible = "snps,dwc2";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0xc9040000 0x40000>;
+                       interrupts = <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>;
+                       phys = <&usb0_phy>;
+                       phy-names = "usb2-phy";
+                       dr_mode = "host";
+                       status = "disabled";
+               };
+
+               usb1: usb@c90c0000 {
+                       compatible = "snps,dwc2";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0xc90c0000 0x40000>;
+                       interrupts = <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>;
+                       phys = <&usb1_phy>;
+                       phy-names = "usb2-phy";
+                       dr_mode = "host";
+                       status = "disabled";
+               };
+
                ethmac: ethernet@c9410000 {
                        compatible = "amlogic,meson6-dwmac", "snps,dwmac";
                        reg = <0xc9410000 0x10000
index b4c5fdd7b45194dfd00b182975b95a6e4acd1b4b..17a4c62555897493cc40380e272ca2653f176520 100644 (file)
 &uart_C {
        clocks = <&clkc CLKID_CLK81>;
 };
+
+&usb0 {
+       compatible = "amlogic,meson8-usb", "snps,dwc2";
+       clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;
+       clock-names = "otg";
+};
+
+&usb1 {
+       compatible = "amlogic,meson8-usb", "snps,dwc2";
+       clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
+       clock-names = "otg";
+};
+
+&usb0_phy {
+       compatible = "amlogic,meson8-usb2-phy", "amlogic,meson-mx-usb2-phy";
+       clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
+       clock-names = "usb_general", "usb";
+};
+
+&usb1_phy {
+       compatible = "amlogic,meson8-usb2-phy", "amlogic,meson-mx-usb2-phy";
+       clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;
+       clock-names = "usb_general", "usb";
+};
index a9d7074e6369db96a05d46b7a17eea20795bca5c..521be5dfa8ef5bdd644616e7c48016dcd84df441 100644 (file)
 &uart_C {
        clocks = <&clkc CLKID_CLK81>;
 };
+
+&usb0 {
+       compatible = "amlogic,meson8b-usb", "snps,dwc2";
+       clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;
+       clock-names = "otg";
+};
+
+&usb1 {
+       compatible = "amlogic,meson8b-usb", "snps,dwc2";
+       clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
+       clock-names = "otg";
+};
+
+&usb0_phy {
+       compatible = "amlogic,meson8b-usb2-phy", "amlogic,meson-mx-usb2-phy";
+       clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
+       clock-names = "usb_general", "usb";
+       resets = <&reset RESET_USB_OTG>;
+};
+
+&usb1_phy {
+       compatible = "amlogic,meson8b-usb2-phy", "amlogic,meson-mx-usb2-phy";
+       clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;
+       clock-names = "usb_general", "usb";
+       resets = <&reset RESET_USB_OTG>;
+};