arm64: dts: Add APM X-Gene PCIe MSI nodes

There is a single MSI block in X-Gene v1 SOC which serves all 5 PCIe ports.

Signed-off-by: Duc Dang <dhdang@apm.com>
Signed-off-by: Tanmay Inamdar <tinamdar@apm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>

diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi
index c8d3e0e866787bcbe7ac1d72b370d20927a15a5d..d8f3a1c65ecda782dec2e6023bfac8044810b38e 100644 (file)
--- a/arch/arm64/boot/dts/apm/apm-storm.dtsi
+++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi
@@ -374,6 +374,28 @@
                        };
                };
 
+               msi: msi@79000000 {
+                       compatible = "apm,xgene1-msi";
+                       msi-controller;
+                       reg = <0x00 0x79000000 0x0 0x900000>;
+                       interrupts = <  0x0 0x10 0x4
+                                       0x0 0x11 0x4
+                                       0x0 0x12 0x4
+                                       0x0 0x13 0x4
+                                       0x0 0x14 0x4
+                                       0x0 0x15 0x4
+                                       0x0 0x16 0x4
+                                       0x0 0x17 0x4
+                                       0x0 0x18 0x4
+                                       0x0 0x19 0x4
+                                       0x0 0x1a 0x4
+                                       0x0 0x1b 0x4
+                                       0x0 0x1c 0x4
+                                       0x0 0x1d 0x4
+                                       0x0 0x1e 0x4
+                                       0x0 0x1f 0x4>;
+               };
+
                pcie0: pcie@1f2b0000 {
                        status = "disabled";
                        device_type = "pci";
@@ -395,6 +417,7 @@
                                         0x0 0x0 0x0 0x4 &gic 0x0 0xc5 0x1>;
                        dma-coherent;
                        clocks = <&pcie0clk 0>;
+                       msi-parent = <&msi>;
                };
 
                pcie1: pcie@1f2c0000 {
@@ -418,6 +441,7 @@
                                         0x0 0x0 0x0 0x4 &gic 0x0 0xcb 0x1>;
                        dma-coherent;
                        clocks = <&pcie1clk 0>;
+                       msi-parent = <&msi>;
                };
 
                pcie2: pcie@1f2d0000 {
@@ -441,6 +465,7 @@
                                         0x0 0x0 0x0 0x4 &gic 0x0 0xd1 0x1>;
                        dma-coherent;
                        clocks = <&pcie2clk 0>;
+                       msi-parent = <&msi>;
                };
 
                pcie3: pcie@1f500000 {
@@ -464,6 +489,7 @@
                                         0x0 0x0 0x0 0x4 &gic 0x0 0xd7 0x1>;
                        dma-coherent;
                        clocks = <&pcie3clk 0>;
+                       msi-parent = <&msi>;
                };
 
                pcie4: pcie@1f510000 {
@@ -487,6 +513,7 @@
                                         0x0 0x0 0x0 0x4 &gic 0x0 0xdd 0x1>;
                        dma-coherent;
                        clocks = <&pcie4clk 0>;
+                       msi-parent = <&msi>;
                };
 
                serial0: serial@1c020000 {