ARM: iMX5: Don't enable DPLL if it already enabled

If the DPLL is already enabled, don't try to enable it again.
Since write to the DPLL control register will make the DPLL
reset and which will cause some issues when some child module
are sourced from this DPLL.

Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
index 6b89c1bf4eb2f7a774b18c7b68871b173b5f4da1..0856482f376de943aa58412004e54c7813534e4f 100644 (file)
--- a/arch/arm/mach-mx5/clock-mx51-mx53.c
+++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
@@ -271,7 +271,11 @@ static int _clk_pll_enable(struct clk *clk)
        int i = 0;
 
        pllbase = _get_pll_base(clk);
-       reg = __raw_readl(pllbase + MXC_PLL_DP_CTL) | MXC_PLL_DP_CTL_UPEN;
+       reg = __raw_readl(pllbase + MXC_PLL_DP_CTL);
+       if (reg & MXC_PLL_DP_CTL_UPEN)
+               return 0;
+
+       reg |= MXC_PLL_DP_CTL_UPEN;
        __raw_writel(reg, pllbase + MXC_PLL_DP_CTL);
 
        /* Wait for lock */