ASoC: dwc: add quirk for different register offset

DWC in ACP 2.x IP has different offsets for I2S_COMP_PARAM_* registers.
Added a quirk to support the same.

Signed-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/include/sound/designware_i2s.h b/include/sound/designware_i2s.h
index 8966ba7c962951de6fd1f972c092266a38b823d2..e0bb45807f2980abff0e0144b7e00e2dd62fb4eb 100644 (file)
--- a/include/sound/designware_i2s.h
+++ b/include/sound/designware_i2s.h
@@ -45,6 +45,11 @@ struct i2s_platform_data {
        u32 snd_fmts;
        u32 snd_rates;
 
+       #define DW_I2S_QUIRK_COMP_REG_OFFSET    (1 << 0)
+       unsigned int quirks;
+       unsigned int i2s_reg_comp1;
+       unsigned int i2s_reg_comp2;
+
        void *play_dma_data;
        void *capture_dma_data;
        bool (*filter)(struct dma_chan *chan, void *slave);

diff --git a/sound/soc/dwc/designware_i2s.c b/sound/soc/dwc/designware_i2s.c
index 3d7754c115ec2266e1e9650d92b1f0c3c3afb14f..940c88136a345a90e9b40f4cdb508090d508157a 100644 (file)
--- a/sound/soc/dwc/designware_i2s.c
+++ b/sound/soc/dwc/designware_i2s.c
@@ -94,6 +94,9 @@ struct dw_i2s_dev {
        struct clk *clk;
        int active;
        unsigned int capability;
+       unsigned int quirks;
+       unsigned int i2s_reg_comp1;
+       unsigned int i2s_reg_comp2;
        struct device *dev;
 
        /* data related to DMA transfers b/w i2s and DMAC */
@@ -477,8 +480,8 @@ static int dw_configure_dai(struct dw_i2s_dev *dev,
         * Read component parameter registers to extract
         * the I2S block's configuration.
         */
-       u32 comp1 = i2s_read_reg(dev->i2s_base, I2S_COMP_PARAM_1);
-       u32 comp2 = i2s_read_reg(dev->i2s_base, I2S_COMP_PARAM_2);
+       u32 comp1 = i2s_read_reg(dev->i2s_base, dev->i2s_reg_comp1);
+       u32 comp2 = i2s_read_reg(dev->i2s_base, dev->i2s_reg_comp2);
        u32 idx;
 
        if (COMP1_TX_ENABLED(comp1)) {
@@ -521,7 +524,7 @@ static int dw_configure_dai_by_pd(struct dw_i2s_dev *dev,
                                   struct resource *res,
                                   const struct i2s_platform_data *pdata)
 {
-       u32 comp1 = i2s_read_reg(dev->i2s_base, I2S_COMP_PARAM_1);
+       u32 comp1 = i2s_read_reg(dev->i2s_base, dev->i2s_reg_comp1);
        u32 idx = COMP1_APB_DATA_WIDTH(comp1);
        int ret;
 
@@ -625,6 +628,14 @@ static int dw_i2s_probe(struct platform_device *pdev)
        if (pdata) {
                dev->capability = pdata->cap;
                clk_id = NULL;
+               dev->quirks = pdata->quirks;
+               if (dev->quirks & DW_I2S_QUIRK_COMP_REG_OFFSET) {
+                       dev->i2s_reg_comp1 = pdata->i2s_reg_comp1;
+                       dev->i2s_reg_comp2 = pdata->i2s_reg_comp2;
+               } else {
+                       dev->i2s_reg_comp1 = I2S_COMP_PARAM_1;
+                       dev->i2s_reg_comp2 = I2S_COMP_PARAM_2;
+               }
                ret = dw_configure_dai_by_pd(dev, dw_i2s_dai, res, pdata);
        } else {
                clk_id = "i2sclk";