drm/amdgpu: add invisible pin size statistic
authorChunming Zhou <David1.Zhou@amd.com>
Tue, 5 Apr 2016 02:48:48 +0000 (10:48 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 6 Apr 2016 18:42:59 +0000 (14:42 -0400)
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu.h
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c

index 62a778012fe06cc572964b463f873c987ca34755..b77489dec6e8ce86cc8c283191fee6a49069f781 100644 (file)
@@ -2034,6 +2034,7 @@ struct amdgpu_device {
 
        /* tracking pinned memory */
        u64 vram_pin_size;
+       u64 invisible_pin_size;
        u64 gart_pin_size;
 
        /* amdkfd interface */
index 598eb0cd5aab6a1b437ad04d0c58dce24adc8d9d..aef70db168329fc7c5db57a1c730fc48c35f1b6e 100644 (file)
@@ -384,7 +384,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
                vram_gtt.vram_size = adev->mc.real_vram_size;
                vram_gtt.vram_size -= adev->vram_pin_size;
                vram_gtt.vram_cpu_accessible_size = adev->mc.visible_vram_size;
-               vram_gtt.vram_cpu_accessible_size -= adev->vram_pin_size;
+               vram_gtt.vram_cpu_accessible_size -= (adev->vram_pin_size - adev->invisible_pin_size);
                vram_gtt.gtt_size  = adev->mc.gtt_size;
                vram_gtt.gtt_size -= adev->gart_pin_size;
                return copy_to_user(out, &vram_gtt,
index 5b6639faa731e83b1b14c07bf673aa30deff52c8..e557fc1f17c8becfb3ddae209942326d05d5a884 100644 (file)
@@ -424,9 +424,11 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
                bo->pin_count = 1;
                if (gpu_addr != NULL)
                        *gpu_addr = amdgpu_bo_gpu_offset(bo);
-               if (domain == AMDGPU_GEM_DOMAIN_VRAM)
+               if (domain == AMDGPU_GEM_DOMAIN_VRAM) {
                        bo->adev->vram_pin_size += amdgpu_bo_size(bo);
-               else
+                       if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
+                               bo->adev->invisible_pin_size += amdgpu_bo_size(bo);
+               } else
                        bo->adev->gart_pin_size += amdgpu_bo_size(bo);
        } else {
                dev_err(bo->adev->dev, "%p pin failed\n", bo);
@@ -456,9 +458,11 @@ int amdgpu_bo_unpin(struct amdgpu_bo *bo)
        }
        r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
        if (likely(r == 0)) {
-               if (bo->tbo.mem.mem_type == TTM_PL_VRAM)
+               if (bo->tbo.mem.mem_type == TTM_PL_VRAM) {
                        bo->adev->vram_pin_size -= amdgpu_bo_size(bo);
-               else
+                       if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
+                               bo->adev->invisible_pin_size -= amdgpu_bo_size(bo);
+               } else
                        bo->adev->gart_pin_size -= amdgpu_bo_size(bo);
        } else {
                dev_err(bo->adev->dev, "%p validate failed for unpin\n", bo);