drm/imx: enable/disable PRG on CRTC enable/disable

On i.MX6 QuadPlus the PRG needs to be clocked in order to pass
through the data access requests from the IDMAC. This call is a
no-op for other all other SoCs.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>

diff --git a/drivers/gpu/drm/imx/ipuv3-crtc.c b/drivers/gpu/drm/imx/ipuv3-crtc.c
index 82772b8d6321698090e29da6957fe94b2c62299f..dab9d50ffd8c19acff327b7a67c94fdc0351c622 100644 (file)
--- a/drivers/gpu/drm/imx/ipuv3-crtc.c
+++ b/drivers/gpu/drm/imx/ipuv3-crtc.c
@@ -55,6 +55,7 @@ static void ipu_crtc_enable(struct drm_crtc *crtc)
        struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
        struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
 
+       ipu_prg_enable(ipu);
        ipu_dc_enable(ipu);
        ipu_dc_enable_channel(ipu_crtc->dc);
        ipu_di_enable(ipu_crtc->di);
@@ -95,6 +96,7 @@ static void ipu_crtc_atomic_disable(struct drm_crtc *crtc,
         */
        ipu_crtc_disable_planes(ipu_crtc, old_crtc_state);
        ipu_dc_disable(ipu);
+       ipu_prg_disable(ipu);
 
        spin_lock_irq(&crtc->dev->event_lock);
        if (crtc->state->event) {