net: dsa: mv88e6xxx: move the Global 1 macros

Move the GLOBAL_* macros where they belong, in the related global1.h
header. Include it in global2.c which uses GLOBAL_STATUS_IRQ_DEVICE.

Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/dsa/mv88e6xxx/chip.h b/drivers/net/dsa/mv88e6xxx/chip.h
index a7c71a43503b4d4fe0e21a4b637f02730f40750f..7e558e9ba35d4f576d0783d2398cdf99a7d2f90e 100644 (file)
--- a/drivers/net/dsa/mv88e6xxx/chip.h
+++ b/drivers/net/dsa/mv88e6xxx/chip.h
@@ -33,147 +33,6 @@
 #define SMI_CMD_OP_45_READ_DATA_INC    ((3 << 10) | SMI_CMD_BUSY)
 #define SMI_DATA               0x01
 
-#define GLOBAL_STATUS          0x00
-#define GLOBAL_STATUS_PPU_STATE BIT(15) /* 6351 and 6171 */
-#define GLOBAL_STATUS_PPU_STATE_MASK           (0x3 << 14) /* 6165 6185 */
-#define GLOBAL_STATUS_PPU_STATE_DISABLED_RST   (0x0 << 14)
-#define GLOBAL_STATUS_PPU_STATE_INITIALIZING   (0x1 << 14)
-#define GLOBAL_STATUS_PPU_STATE_DISABLED       (0x2 << 14)
-#define GLOBAL_STATUS_PPU_STATE_POLLING                (0x3 << 14)
-#define GLOBAL_STATUS_INIT_READY       BIT(11)
-#define GLOBAL_STATUS_IRQ_AVB          8
-#define GLOBAL_STATUS_IRQ_DEVICE       7
-#define GLOBAL_STATUS_IRQ_STATS                6
-#define GLOBAL_STATUS_IRQ_VTU_PROBLEM  5
-#define GLOBAL_STATUS_IRQ_VTU_DONE     4
-#define GLOBAL_STATUS_IRQ_ATU_PROBLEM  3
-#define GLOBAL_STATUS_IRQ_ATU_DONE     2
-#define GLOBAL_STATUS_IRQ_TCAM_DONE    1
-#define GLOBAL_STATUS_IRQ_EEPROM_DONE  0
-#define GLOBAL_MAC_01          0x01
-#define GLOBAL_MAC_23          0x02
-#define GLOBAL_MAC_45          0x03
-#define GLOBAL_ATU_FID         0x01
-#define GLOBAL_VTU_FID         0x02
-#define GLOBAL_VTU_FID_MASK    0xfff
-#define GLOBAL_VTU_SID         0x03    /* 6097 6165 6351 6352 */
-#define GLOBAL_VTU_SID_MASK    0x3f
-#define GLOBAL_CONTROL         0x04
-#define GLOBAL_CONTROL_SW_RESET                BIT(15)
-#define GLOBAL_CONTROL_PPU_ENABLE      BIT(14)
-#define GLOBAL_CONTROL_DISCARD_EXCESS  BIT(13) /* 6352 */
-#define GLOBAL_CONTROL_SCHED_PRIO      BIT(11) /* 6152 */
-#define GLOBAL_CONTROL_MAX_FRAME_1632  BIT(10) /* 6152 */
-#define GLOBAL_CONTROL_RELOAD_EEPROM   BIT(9)  /* 6152 */
-#define GLOBAL_CONTROL_DEVICE_EN       BIT(7)
-#define GLOBAL_CONTROL_STATS_DONE_EN   BIT(6)
-#define GLOBAL_CONTROL_VTU_PROBLEM_EN  BIT(5)
-#define GLOBAL_CONTROL_VTU_DONE_EN     BIT(4)
-#define GLOBAL_CONTROL_ATU_PROBLEM_EN  BIT(3)
-#define GLOBAL_CONTROL_ATU_DONE_EN     BIT(2)
-#define GLOBAL_CONTROL_TCAM_EN         BIT(1)
-#define GLOBAL_CONTROL_EEPROM_DONE_EN  BIT(0)
-#define GLOBAL_VTU_OP          0x05
-#define GLOBAL_VTU_OP_BUSY     BIT(15)
-#define GLOBAL_VTU_OP_FLUSH_ALL                ((0x01 << 12) | GLOBAL_VTU_OP_BUSY)
-#define GLOBAL_VTU_OP_VTU_LOAD_PURGE   ((0x03 << 12) | GLOBAL_VTU_OP_BUSY)
-#define GLOBAL_VTU_OP_VTU_GET_NEXT     ((0x04 << 12) | GLOBAL_VTU_OP_BUSY)
-#define GLOBAL_VTU_OP_STU_LOAD_PURGE   ((0x05 << 12) | GLOBAL_VTU_OP_BUSY)
-#define GLOBAL_VTU_OP_STU_GET_NEXT     ((0x06 << 12) | GLOBAL_VTU_OP_BUSY)
-#define GLOBAL_VTU_VID         0x06
-#define GLOBAL_VTU_VID_MASK    0xfff
-#define GLOBAL_VTU_VID_PAGE    BIT(13)
-#define GLOBAL_VTU_VID_VALID   BIT(12)
-#define GLOBAL_VTU_DATA_0_3    0x07
-#define GLOBAL_VTU_DATA_4_7    0x08
-#define GLOBAL_VTU_DATA_8_11   0x09
-#define GLOBAL_VTU_STU_DATA_MASK               0x03
-#define GLOBAL_VTU_DATA_MEMBER_TAG_UNMODIFIED  0x00
-#define GLOBAL_VTU_DATA_MEMBER_TAG_UNTAGGED    0x01
-#define GLOBAL_VTU_DATA_MEMBER_TAG_TAGGED      0x02
-#define GLOBAL_VTU_DATA_MEMBER_TAG_NON_MEMBER  0x03
-#define GLOBAL_STU_DATA_PORT_STATE_DISABLED    0x00
-#define GLOBAL_STU_DATA_PORT_STATE_BLOCKING    0x01
-#define GLOBAL_STU_DATA_PORT_STATE_LEARNING    0x02
-#define GLOBAL_STU_DATA_PORT_STATE_FORWARDING  0x03
-#define GLOBAL_ATU_CONTROL     0x0a
-#define GLOBAL_ATU_CONTROL_LEARN2ALL   BIT(3)
-#define GLOBAL_ATU_OP          0x0b
-#define GLOBAL_ATU_OP_BUSY     BIT(15)
-#define GLOBAL_ATU_OP_NOP              (0 << 12)
-#define GLOBAL_ATU_OP_FLUSH_MOVE_ALL           ((1 << 12) | GLOBAL_ATU_OP_BUSY)
-#define GLOBAL_ATU_OP_FLUSH_MOVE_NON_STATIC    ((2 << 12) | GLOBAL_ATU_OP_BUSY)
-#define GLOBAL_ATU_OP_LOAD_DB          ((3 << 12) | GLOBAL_ATU_OP_BUSY)
-#define GLOBAL_ATU_OP_GET_NEXT_DB      ((4 << 12) | GLOBAL_ATU_OP_BUSY)
-#define GLOBAL_ATU_OP_FLUSH_MOVE_ALL_DB                ((5 << 12) | GLOBAL_ATU_OP_BUSY)
-#define GLOBAL_ATU_OP_FLUSH_MOVE_NON_STATIC_DB ((6 << 12) | GLOBAL_ATU_OP_BUSY)
-#define GLOBAL_ATU_OP_GET_CLR_VIOLATION          ((7 << 12) | GLOBAL_ATU_OP_BUSY)
-#define GLOBAL_ATU_DATA                0x0c
-#define GLOBAL_ATU_DATA_TRUNK                  BIT(15)
-#define GLOBAL_ATU_DATA_TRUNK_ID_MASK          0x00f0
-#define GLOBAL_ATU_DATA_TRUNK_ID_SHIFT         4
-#define GLOBAL_ATU_DATA_PORT_VECTOR_MASK       0x3ff0
-#define GLOBAL_ATU_DATA_PORT_VECTOR_SHIFT      4
-#define GLOBAL_ATU_DATA_STATE_MASK             0x0f
-#define GLOBAL_ATU_DATA_STATE_UNUSED           0x00
-#define GLOBAL_ATU_DATA_STATE_UC_MGMT          0x0d
-#define GLOBAL_ATU_DATA_STATE_UC_STATIC                0x0e
-#define GLOBAL_ATU_DATA_STATE_UC_PRIO_OVER     0x0f
-#define GLOBAL_ATU_DATA_STATE_MC_NONE_RATE     0x05
-#define GLOBAL_ATU_DATA_STATE_MC_STATIC                0x07
-#define GLOBAL_ATU_DATA_STATE_MC_MGMT          0x0e
-#define GLOBAL_ATU_DATA_STATE_MC_PRIO_OVER     0x0f
-#define GLOBAL_ATU_MAC_01      0x0d
-#define GLOBAL_ATU_MAC_23      0x0e
-#define GLOBAL_ATU_MAC_45      0x0f
-#define GLOBAL_IP_PRI_0                0x10
-#define GLOBAL_IP_PRI_1                0x11
-#define GLOBAL_IP_PRI_2                0x12
-#define GLOBAL_IP_PRI_3                0x13
-#define GLOBAL_IP_PRI_4                0x14
-#define GLOBAL_IP_PRI_5                0x15
-#define GLOBAL_IP_PRI_6                0x16
-#define GLOBAL_IP_PRI_7                0x17
-#define GLOBAL_IEEE_PRI                0x18
-#define GLOBAL_CORE_TAG_TYPE   0x19
-#define GLOBAL_MONITOR_CONTROL 0x1a
-#define GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT   12
-#define GLOBAL_MONITOR_CONTROL_INGRESS_MASK    (0xf << 12)
-#define GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT    8
-#define GLOBAL_MONITOR_CONTROL_EGRESS_MASK     (0xf << 8)
-#define GLOBAL_MONITOR_CONTROL_ARP_SHIFT       4
-#define GLOBAL_MONITOR_CONTROL_ARP_MASK                (0xf << 4)
-#define GLOBAL_MONITOR_CONTROL_MIRROR_SHIFT    0
-#define GLOBAL_MONITOR_CONTROL_ARP_DISABLED    (0xf0)
-#define GLOBAL_MONITOR_CONTROL_UPDATE                  BIT(15)
-#define GLOBAL_MONITOR_CONTROL_0180C280000000XLO       (0x00 << 8)
-#define GLOBAL_MONITOR_CONTROL_0180C280000000XHI       (0x01 << 8)
-#define GLOBAL_MONITOR_CONTROL_0180C280000002XLO       (0x02 << 8)
-#define GLOBAL_MONITOR_CONTROL_0180C280000002XHI       (0x03 << 8)
-#define GLOBAL_MONITOR_CONTROL_INGRESS                 (0x20 << 8)
-#define GLOBAL_MONITOR_CONTROL_EGRESS                  (0x21 << 8)
-#define GLOBAL_MONITOR_CONTROL_CPU_DEST                        (0x30 << 8)
-#define GLOBAL_CONTROL_2       0x1c
-#define GLOBAL_CONTROL_2_NO_CASCADE            0xe000
-#define GLOBAL_CONTROL_2_MULTIPLE_CASCADE      0xf000
-#define GLOBAL_CONTROL_2_HIST_RX              (0x1 << 6)
-#define GLOBAL_CONTROL_2_HIST_TX              (0x2 << 6)
-#define GLOBAL_CONTROL_2_HIST_RX_TX           (0x3 << 6)
-#define GLOBAL_STATS_OP                0x1d
-#define GLOBAL_STATS_OP_BUSY   BIT(15)
-#define GLOBAL_STATS_OP_NOP            (0 << 12)
-#define GLOBAL_STATS_OP_FLUSH_ALL      ((1 << 12) | GLOBAL_STATS_OP_BUSY)
-#define GLOBAL_STATS_OP_FLUSH_PORT     ((2 << 12) | GLOBAL_STATS_OP_BUSY)
-#define GLOBAL_STATS_OP_READ_CAPTURED  ((4 << 12) | GLOBAL_STATS_OP_BUSY)
-#define GLOBAL_STATS_OP_CAPTURE_PORT   ((5 << 12) | GLOBAL_STATS_OP_BUSY)
-#define GLOBAL_STATS_OP_HIST_RX                ((1 << 10) | GLOBAL_STATS_OP_BUSY)
-#define GLOBAL_STATS_OP_HIST_TX                ((2 << 10) | GLOBAL_STATS_OP_BUSY)
-#define GLOBAL_STATS_OP_HIST_RX_TX     ((3 << 10) | GLOBAL_STATS_OP_BUSY)
-#define GLOBAL_STATS_OP_BANK_1_BIT_9   BIT(9)
-#define GLOBAL_STATS_OP_BANK_1_BIT_10  BIT(10)
-#define GLOBAL_STATS_COUNTER_32        0x1e
-#define GLOBAL_STATS_COUNTER_01        0x1f
-
 #define GLOBAL2_INT_SOURCE     0x00
 #define GLOBAL2_INT_SOURCE_WATCHDOG    15
 #define GLOBAL2_INT_MASK       0x01

diff --git a/drivers/net/dsa/mv88e6xxx/global1.h b/drivers/net/dsa/mv88e6xxx/global1.h
index 3b8f356b348c577ea7d59c1c44ec9b992d1b0203..3e2765c53f89caafac6a4b2695112f677bb8592c 100644 (file)
--- a/drivers/net/dsa/mv88e6xxx/global1.h
+++ b/drivers/net/dsa/mv88e6xxx/global1.h
@@ -17,6 +17,147 @@
 
 #include "chip.h"
 
+#define GLOBAL_STATUS          0x00
+#define GLOBAL_STATUS_PPU_STATE BIT(15) /* 6351 and 6171 */
+#define GLOBAL_STATUS_PPU_STATE_MASK           (0x3 << 14) /* 6165 6185 */
+#define GLOBAL_STATUS_PPU_STATE_DISABLED_RST   (0x0 << 14)
+#define GLOBAL_STATUS_PPU_STATE_INITIALIZING   (0x1 << 14)
+#define GLOBAL_STATUS_PPU_STATE_DISABLED       (0x2 << 14)
+#define GLOBAL_STATUS_PPU_STATE_POLLING                (0x3 << 14)
+#define GLOBAL_STATUS_INIT_READY       BIT(11)
+#define GLOBAL_STATUS_IRQ_AVB          8
+#define GLOBAL_STATUS_IRQ_DEVICE       7
+#define GLOBAL_STATUS_IRQ_STATS                6
+#define GLOBAL_STATUS_IRQ_VTU_PROBLEM  5
+#define GLOBAL_STATUS_IRQ_VTU_DONE     4
+#define GLOBAL_STATUS_IRQ_ATU_PROBLEM  3
+#define GLOBAL_STATUS_IRQ_ATU_DONE     2
+#define GLOBAL_STATUS_IRQ_TCAM_DONE    1
+#define GLOBAL_STATUS_IRQ_EEPROM_DONE  0
+#define GLOBAL_MAC_01          0x01
+#define GLOBAL_MAC_23          0x02
+#define GLOBAL_MAC_45          0x03
+#define GLOBAL_ATU_FID         0x01
+#define GLOBAL_VTU_FID         0x02
+#define GLOBAL_VTU_FID_MASK    0xfff
+#define GLOBAL_VTU_SID         0x03    /* 6097 6165 6351 6352 */
+#define GLOBAL_VTU_SID_MASK    0x3f
+#define GLOBAL_CONTROL         0x04
+#define GLOBAL_CONTROL_SW_RESET                BIT(15)
+#define GLOBAL_CONTROL_PPU_ENABLE      BIT(14)
+#define GLOBAL_CONTROL_DISCARD_EXCESS  BIT(13) /* 6352 */
+#define GLOBAL_CONTROL_SCHED_PRIO      BIT(11) /* 6152 */
+#define GLOBAL_CONTROL_MAX_FRAME_1632  BIT(10) /* 6152 */
+#define GLOBAL_CONTROL_RELOAD_EEPROM   BIT(9)  /* 6152 */
+#define GLOBAL_CONTROL_DEVICE_EN       BIT(7)
+#define GLOBAL_CONTROL_STATS_DONE_EN   BIT(6)
+#define GLOBAL_CONTROL_VTU_PROBLEM_EN  BIT(5)
+#define GLOBAL_CONTROL_VTU_DONE_EN     BIT(4)
+#define GLOBAL_CONTROL_ATU_PROBLEM_EN  BIT(3)
+#define GLOBAL_CONTROL_ATU_DONE_EN     BIT(2)
+#define GLOBAL_CONTROL_TCAM_EN         BIT(1)
+#define GLOBAL_CONTROL_EEPROM_DONE_EN  BIT(0)
+#define GLOBAL_VTU_OP          0x05
+#define GLOBAL_VTU_OP_BUSY     BIT(15)
+#define GLOBAL_VTU_OP_FLUSH_ALL                ((0x01 << 12) | GLOBAL_VTU_OP_BUSY)
+#define GLOBAL_VTU_OP_VTU_LOAD_PURGE   ((0x03 << 12) | GLOBAL_VTU_OP_BUSY)
+#define GLOBAL_VTU_OP_VTU_GET_NEXT     ((0x04 << 12) | GLOBAL_VTU_OP_BUSY)
+#define GLOBAL_VTU_OP_STU_LOAD_PURGE   ((0x05 << 12) | GLOBAL_VTU_OP_BUSY)
+#define GLOBAL_VTU_OP_STU_GET_NEXT     ((0x06 << 12) | GLOBAL_VTU_OP_BUSY)
+#define GLOBAL_VTU_VID         0x06
+#define GLOBAL_VTU_VID_MASK    0xfff
+#define GLOBAL_VTU_VID_PAGE    BIT(13)
+#define GLOBAL_VTU_VID_VALID   BIT(12)
+#define GLOBAL_VTU_DATA_0_3    0x07
+#define GLOBAL_VTU_DATA_4_7    0x08
+#define GLOBAL_VTU_DATA_8_11   0x09
+#define GLOBAL_VTU_STU_DATA_MASK               0x03
+#define GLOBAL_VTU_DATA_MEMBER_TAG_UNMODIFIED  0x00
+#define GLOBAL_VTU_DATA_MEMBER_TAG_UNTAGGED    0x01
+#define GLOBAL_VTU_DATA_MEMBER_TAG_TAGGED      0x02
+#define GLOBAL_VTU_DATA_MEMBER_TAG_NON_MEMBER  0x03
+#define GLOBAL_STU_DATA_PORT_STATE_DISABLED    0x00
+#define GLOBAL_STU_DATA_PORT_STATE_BLOCKING    0x01
+#define GLOBAL_STU_DATA_PORT_STATE_LEARNING    0x02
+#define GLOBAL_STU_DATA_PORT_STATE_FORWARDING  0x03
+#define GLOBAL_ATU_CONTROL     0x0a
+#define GLOBAL_ATU_CONTROL_LEARN2ALL   BIT(3)
+#define GLOBAL_ATU_OP          0x0b
+#define GLOBAL_ATU_OP_BUSY     BIT(15)
+#define GLOBAL_ATU_OP_NOP              (0 << 12)
+#define GLOBAL_ATU_OP_FLUSH_MOVE_ALL           ((1 << 12) | GLOBAL_ATU_OP_BUSY)
+#define GLOBAL_ATU_OP_FLUSH_MOVE_NON_STATIC    ((2 << 12) | GLOBAL_ATU_OP_BUSY)
+#define GLOBAL_ATU_OP_LOAD_DB          ((3 << 12) | GLOBAL_ATU_OP_BUSY)
+#define GLOBAL_ATU_OP_GET_NEXT_DB      ((4 << 12) | GLOBAL_ATU_OP_BUSY)
+#define GLOBAL_ATU_OP_FLUSH_MOVE_ALL_DB                ((5 << 12) | GLOBAL_ATU_OP_BUSY)
+#define GLOBAL_ATU_OP_FLUSH_MOVE_NON_STATIC_DB ((6 << 12) | GLOBAL_ATU_OP_BUSY)
+#define GLOBAL_ATU_OP_GET_CLR_VIOLATION          ((7 << 12) | GLOBAL_ATU_OP_BUSY)
+#define GLOBAL_ATU_DATA                0x0c
+#define GLOBAL_ATU_DATA_TRUNK                  BIT(15)
+#define GLOBAL_ATU_DATA_TRUNK_ID_MASK          0x00f0
+#define GLOBAL_ATU_DATA_TRUNK_ID_SHIFT         4
+#define GLOBAL_ATU_DATA_PORT_VECTOR_MASK       0x3ff0
+#define GLOBAL_ATU_DATA_PORT_VECTOR_SHIFT      4
+#define GLOBAL_ATU_DATA_STATE_MASK             0x0f
+#define GLOBAL_ATU_DATA_STATE_UNUSED           0x00
+#define GLOBAL_ATU_DATA_STATE_UC_MGMT          0x0d
+#define GLOBAL_ATU_DATA_STATE_UC_STATIC                0x0e
+#define GLOBAL_ATU_DATA_STATE_UC_PRIO_OVER     0x0f
+#define GLOBAL_ATU_DATA_STATE_MC_NONE_RATE     0x05
+#define GLOBAL_ATU_DATA_STATE_MC_STATIC                0x07
+#define GLOBAL_ATU_DATA_STATE_MC_MGMT          0x0e
+#define GLOBAL_ATU_DATA_STATE_MC_PRIO_OVER     0x0f
+#define GLOBAL_ATU_MAC_01      0x0d
+#define GLOBAL_ATU_MAC_23      0x0e
+#define GLOBAL_ATU_MAC_45      0x0f
+#define GLOBAL_IP_PRI_0                0x10
+#define GLOBAL_IP_PRI_1                0x11
+#define GLOBAL_IP_PRI_2                0x12
+#define GLOBAL_IP_PRI_3                0x13
+#define GLOBAL_IP_PRI_4                0x14
+#define GLOBAL_IP_PRI_5                0x15
+#define GLOBAL_IP_PRI_6                0x16
+#define GLOBAL_IP_PRI_7                0x17
+#define GLOBAL_IEEE_PRI                0x18
+#define GLOBAL_CORE_TAG_TYPE   0x19
+#define GLOBAL_MONITOR_CONTROL 0x1a
+#define GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT   12
+#define GLOBAL_MONITOR_CONTROL_INGRESS_MASK    (0xf << 12)
+#define GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT    8
+#define GLOBAL_MONITOR_CONTROL_EGRESS_MASK     (0xf << 8)
+#define GLOBAL_MONITOR_CONTROL_ARP_SHIFT       4
+#define GLOBAL_MONITOR_CONTROL_ARP_MASK                (0xf << 4)
+#define GLOBAL_MONITOR_CONTROL_MIRROR_SHIFT    0
+#define GLOBAL_MONITOR_CONTROL_ARP_DISABLED    (0xf0)
+#define GLOBAL_MONITOR_CONTROL_UPDATE                  BIT(15)
+#define GLOBAL_MONITOR_CONTROL_0180C280000000XLO       (0x00 << 8)
+#define GLOBAL_MONITOR_CONTROL_0180C280000000XHI       (0x01 << 8)
+#define GLOBAL_MONITOR_CONTROL_0180C280000002XLO       (0x02 << 8)
+#define GLOBAL_MONITOR_CONTROL_0180C280000002XHI       (0x03 << 8)
+#define GLOBAL_MONITOR_CONTROL_INGRESS                 (0x20 << 8)
+#define GLOBAL_MONITOR_CONTROL_EGRESS                  (0x21 << 8)
+#define GLOBAL_MONITOR_CONTROL_CPU_DEST                        (0x30 << 8)
+#define GLOBAL_CONTROL_2       0x1c
+#define GLOBAL_CONTROL_2_NO_CASCADE            0xe000
+#define GLOBAL_CONTROL_2_MULTIPLE_CASCADE      0xf000
+#define GLOBAL_CONTROL_2_HIST_RX              (0x1 << 6)
+#define GLOBAL_CONTROL_2_HIST_TX              (0x2 << 6)
+#define GLOBAL_CONTROL_2_HIST_RX_TX           (0x3 << 6)
+#define GLOBAL_STATS_OP                0x1d
+#define GLOBAL_STATS_OP_BUSY   BIT(15)
+#define GLOBAL_STATS_OP_NOP            (0 << 12)
+#define GLOBAL_STATS_OP_FLUSH_ALL      ((1 << 12) | GLOBAL_STATS_OP_BUSY)
+#define GLOBAL_STATS_OP_FLUSH_PORT     ((2 << 12) | GLOBAL_STATS_OP_BUSY)
+#define GLOBAL_STATS_OP_READ_CAPTURED  ((4 << 12) | GLOBAL_STATS_OP_BUSY)
+#define GLOBAL_STATS_OP_CAPTURE_PORT   ((5 << 12) | GLOBAL_STATS_OP_BUSY)
+#define GLOBAL_STATS_OP_HIST_RX                ((1 << 10) | GLOBAL_STATS_OP_BUSY)
+#define GLOBAL_STATS_OP_HIST_TX                ((2 << 10) | GLOBAL_STATS_OP_BUSY)
+#define GLOBAL_STATS_OP_HIST_RX_TX     ((3 << 10) | GLOBAL_STATS_OP_BUSY)
+#define GLOBAL_STATS_OP_BANK_1_BIT_9   BIT(9)
+#define GLOBAL_STATS_OP_BANK_1_BIT_10  BIT(10)
+#define GLOBAL_STATS_COUNTER_32        0x1e
+#define GLOBAL_STATS_COUNTER_01        0x1f
+
 int mv88e6xxx_g1_read(struct mv88e6xxx_chip *chip, int reg, u16 *val);
 int mv88e6xxx_g1_write(struct mv88e6xxx_chip *chip, int reg, u16 val);
 int mv88e6xxx_g1_wait(struct mv88e6xxx_chip *chip, int reg, u16 mask);

diff --git a/drivers/net/dsa/mv88e6xxx/global2.c b/drivers/net/dsa/mv88e6xxx/global2.c
index 0defce71e3811a01d8e06aea47767573516899e3..538a8a27d912033c7534be2185efcbc92883941b 100644 (file)
--- a/drivers/net/dsa/mv88e6xxx/global2.c
+++ b/drivers/net/dsa/mv88e6xxx/global2.c
@@ -17,6 +17,7 @@
 #include <linux/irqdomain.h>
 
 #include "chip.h"
+#include "global1.h" /* for GLOBAL_STATUS_IRQ_DEVICE */
 #include "global2.h"
 
 #define ADDR_GLOBAL2   0x1c