drm/radeon/kms: handle the case of no active displays properly in the bandwidth code
authorAlex Deucher <alexdeucher@gmail.com>
Mon, 2 Aug 2010 16:13:46 +0000 (12:13 -0400)
committerDave Airlie <airlied@redhat.com>
Tue, 3 Aug 2010 23:49:20 +0000 (09:49 +1000)
Logic was:
if (mode0 && mode1)
else if (mode0)
else

Should be:
if (mode0 && mode1)
else if (mode0)
else if (mode1)

Otherwise we may end up calculating the priority regs with
unitialized values.

Fixes:
https://bugzilla.kernel.org/show_bug.cgi?id=16492

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/radeon/rs690.c
drivers/gpu/drm/radeon/rv515.c

index f3a8c9344c64b27600bed94bbe9c81a7bfc9f6f7..6fbb874583f4425306e92572a2fdd2f6a564347b 100644 (file)
@@ -398,7 +398,9 @@ void rs690_bandwidth_update(struct radeon_device *rdev)
        struct drm_display_mode *mode1 = NULL;
        struct rs690_watermark wm0;
        struct rs690_watermark wm1;
-       u32 tmp, d1mode_priority_a_cnt, d2mode_priority_a_cnt;
+       u32 tmp;
+       u32 d1mode_priority_a_cnt = S_006548_D1MODE_PRIORITY_A_OFF(1);
+       u32 d2mode_priority_a_cnt = S_006548_D1MODE_PRIORITY_A_OFF(1);
        fixed20_12 priority_mark02, priority_mark12, fill_rate;
        fixed20_12 a, b;
 
@@ -495,10 +497,6 @@ void rs690_bandwidth_update(struct radeon_device *rdev)
                        d1mode_priority_a_cnt |= S_006548_D1MODE_PRIORITY_A_ALWAYS_ON(1);
                        d2mode_priority_a_cnt |= S_006D48_D2MODE_PRIORITY_A_ALWAYS_ON(1);
                }
-               WREG32(R_006548_D1MODE_PRIORITY_A_CNT, d1mode_priority_a_cnt);
-               WREG32(R_00654C_D1MODE_PRIORITY_B_CNT, d1mode_priority_a_cnt);
-               WREG32(R_006D48_D2MODE_PRIORITY_A_CNT, d2mode_priority_a_cnt);
-               WREG32(R_006D4C_D2MODE_PRIORITY_B_CNT, d2mode_priority_a_cnt);
        } else if (mode0) {
                if (dfixed_trunc(wm0.dbpp) > 64)
                        a.full = dfixed_mul(wm0.dbpp, wm0.num_line_pair);
@@ -528,13 +526,7 @@ void rs690_bandwidth_update(struct radeon_device *rdev)
                d1mode_priority_a_cnt = dfixed_trunc(priority_mark02);
                if (rdev->disp_priority == 2)
                        d1mode_priority_a_cnt |= S_006548_D1MODE_PRIORITY_A_ALWAYS_ON(1);
-               WREG32(R_006548_D1MODE_PRIORITY_A_CNT, d1mode_priority_a_cnt);
-               WREG32(R_00654C_D1MODE_PRIORITY_B_CNT, d1mode_priority_a_cnt);
-               WREG32(R_006D48_D2MODE_PRIORITY_A_CNT,
-                       S_006D48_D2MODE_PRIORITY_A_OFF(1));
-               WREG32(R_006D4C_D2MODE_PRIORITY_B_CNT,
-                       S_006D4C_D2MODE_PRIORITY_B_OFF(1));
-       } else {
+       } else if (mode1) {
                if (dfixed_trunc(wm1.dbpp) > 64)
                        a.full = dfixed_mul(wm1.dbpp, wm1.num_line_pair);
                else
@@ -563,13 +555,12 @@ void rs690_bandwidth_update(struct radeon_device *rdev)
                d2mode_priority_a_cnt = dfixed_trunc(priority_mark12);
                if (rdev->disp_priority == 2)
                        d2mode_priority_a_cnt |= S_006D48_D2MODE_PRIORITY_A_ALWAYS_ON(1);
-               WREG32(R_006548_D1MODE_PRIORITY_A_CNT,
-                       S_006548_D1MODE_PRIORITY_A_OFF(1));
-               WREG32(R_00654C_D1MODE_PRIORITY_B_CNT,
-                       S_00654C_D1MODE_PRIORITY_B_OFF(1));
-               WREG32(R_006D48_D2MODE_PRIORITY_A_CNT, d2mode_priority_a_cnt);
-               WREG32(R_006D4C_D2MODE_PRIORITY_B_CNT, d2mode_priority_a_cnt);
        }
+
+       WREG32(R_006548_D1MODE_PRIORITY_A_CNT, d1mode_priority_a_cnt);
+       WREG32(R_00654C_D1MODE_PRIORITY_B_CNT, d1mode_priority_a_cnt);
+       WREG32(R_006D48_D2MODE_PRIORITY_A_CNT, d2mode_priority_a_cnt);
+       WREG32(R_006D4C_D2MODE_PRIORITY_B_CNT, d2mode_priority_a_cnt);
 }
 
 uint32_t rs690_mc_rreg(struct radeon_device *rdev, uint32_t reg)
index b951b8790175eb5c82e76f21cbfb8a8e44411c6c..4d6e86041a9fde07f8caa56c4f90ba75c05a9f9e 100644 (file)
@@ -927,7 +927,9 @@ void rv515_bandwidth_avivo_update(struct radeon_device *rdev)
        struct drm_display_mode *mode1 = NULL;
        struct rv515_watermark wm0;
        struct rv515_watermark wm1;
-       u32 tmp, d1mode_priority_a_cnt, d2mode_priority_a_cnt;
+       u32 tmp;
+       u32 d1mode_priority_a_cnt = MODE_PRIORITY_OFF;
+       u32 d2mode_priority_a_cnt = MODE_PRIORITY_OFF;
        fixed20_12 priority_mark02, priority_mark12, fill_rate;
        fixed20_12 a, b;
 
@@ -1001,10 +1003,6 @@ void rv515_bandwidth_avivo_update(struct radeon_device *rdev)
                        d1mode_priority_a_cnt |= MODE_PRIORITY_ALWAYS_ON;
                        d2mode_priority_a_cnt |= MODE_PRIORITY_ALWAYS_ON;
                }
-               WREG32(D1MODE_PRIORITY_A_CNT, d1mode_priority_a_cnt);
-               WREG32(D1MODE_PRIORITY_B_CNT, d1mode_priority_a_cnt);
-               WREG32(D2MODE_PRIORITY_A_CNT, d2mode_priority_a_cnt);
-               WREG32(D2MODE_PRIORITY_B_CNT, d2mode_priority_a_cnt);
        } else if (mode0) {
                if (dfixed_trunc(wm0.dbpp) > 64)
                        a.full = dfixed_div(wm0.dbpp, wm0.num_line_pair);
@@ -1034,11 +1032,7 @@ void rv515_bandwidth_avivo_update(struct radeon_device *rdev)
                d1mode_priority_a_cnt = dfixed_trunc(priority_mark02);
                if (rdev->disp_priority == 2)
                        d1mode_priority_a_cnt |= MODE_PRIORITY_ALWAYS_ON;
-               WREG32(D1MODE_PRIORITY_A_CNT, d1mode_priority_a_cnt);
-               WREG32(D1MODE_PRIORITY_B_CNT, d1mode_priority_a_cnt);
-               WREG32(D2MODE_PRIORITY_A_CNT, MODE_PRIORITY_OFF);
-               WREG32(D2MODE_PRIORITY_B_CNT, MODE_PRIORITY_OFF);
-       } else {
+       } else if (mode1) {
                if (dfixed_trunc(wm1.dbpp) > 64)
                        a.full = dfixed_div(wm1.dbpp, wm1.num_line_pair);
                else
@@ -1067,11 +1061,12 @@ void rv515_bandwidth_avivo_update(struct radeon_device *rdev)
                d2mode_priority_a_cnt = dfixed_trunc(priority_mark12);
                if (rdev->disp_priority == 2)
                        d2mode_priority_a_cnt |= MODE_PRIORITY_ALWAYS_ON;
-               WREG32(D1MODE_PRIORITY_A_CNT, MODE_PRIORITY_OFF);
-               WREG32(D1MODE_PRIORITY_B_CNT, MODE_PRIORITY_OFF);
-               WREG32(D2MODE_PRIORITY_A_CNT, d2mode_priority_a_cnt);
-               WREG32(D2MODE_PRIORITY_B_CNT, d2mode_priority_a_cnt);
        }
+
+       WREG32(D1MODE_PRIORITY_A_CNT, d1mode_priority_a_cnt);
+       WREG32(D1MODE_PRIORITY_B_CNT, d1mode_priority_a_cnt);
+       WREG32(D2MODE_PRIORITY_A_CNT, d2mode_priority_a_cnt);
+       WREG32(D2MODE_PRIORITY_B_CNT, d2mode_priority_a_cnt);
 }
 
 void rv515_bandwidth_update(struct radeon_device *rdev)