CLKDEV_CON_DEV_ID(NULL, "atmel_sha", &aestdessha_clk),
CLKDEV_CON_DEV_ID(NULL, "atmel_tdes", &aestdessha_clk),
CLKDEV_CON_DEV_ID(NULL, "atmel_aes", &aestdessha_clk),
+ CLKDEV_CON_DEV_ID(NULL, "at91sam9rl-pwm", &pwm_clk),
/* more usart lookup table for DT entries */
CLKDEV_CON_DEV_ID("usart", "ffffee00.serial", &mck),
CLKDEV_CON_DEV_ID("usart", "fff8c000.serial", &usart0_clk),
* PWM
* --------------------------------------------------------------------*/
-#if defined(CONFIG_ATMEL_PWM) || defined(CONFIG_ATMEL_PWM_MODULE)
-static u32 pwm_mask;
-
+#if IS_ENABLED(CONFIG_PWM_ATMEL)
static struct resource pwm_resources[] = {
[0] = {
.start = AT91SAM9G45_BASE_PWMC,
};
static struct platform_device at91sam9g45_pwm0_device = {
- .name = "atmel_pwm",
+ .name = "at91sam9rl-pwm",
.id = -1,
- .dev = {
- .platform_data = &pwm_mask,
- },
.resource = pwm_resources,
.num_resources = ARRAY_SIZE(pwm_resources),
};
if (mask & (1 << AT91_PWM3))
at91_set_B_periph(AT91_PIN_PD0, 1); /* enable PWM3 */
- pwm_mask = mask;
-
platform_device_register(&at91sam9g45_pwm0_device);
}
#else