x86: Fix typo in Intel CPU cache size descriptor

I double-checked the datasheet. One of the existing
descriptors has a typo: it should be 2MB not 2038 KB.

Signed-off-by: Dave Jones <davej@redhat.com>
Cc: <stable@kernel.org> # .3x.x: 85160b9: x86: Add new Intel CPU cache size descriptors
Cc: <stable@kernel.org> # .3x.x
LKML-Reference: <20091110200120.GA27090@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index 14103924b6272548a635364af5816e193bd2be9b..8178d03529354951e9fc74c6214e1b7c1f619053 100644 (file)
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -94,7 +94,7 @@ static const struct _cache_table __cpuinitconst cache_table[] =
        { 0xd1, LVL_3,    1024 },       /* 4-way set assoc, 64 byte line size */
        { 0xd2, LVL_3,    2048 },       /* 4-way set assoc, 64 byte line size */
        { 0xd6, LVL_3,    1024 },       /* 8-way set assoc, 64 byte line size */
-       { 0xd7, LVL_3,    2038 },       /* 8-way set assoc, 64 byte line size */
+       { 0xd7, LVL_3,    2048 },       /* 8-way set assoc, 64 byte line size */
        { 0xd8, LVL_3,    4096 },       /* 12-way set assoc, 64 byte line size */
        { 0xdc, LVL_3,    2048 },       /* 12-way set assoc, 64 byte line size */
        { 0xdd, LVL_3,    4096 },       /* 12-way set assoc, 64 byte line size */