Android T: green screen issue [1/1]

PD#SWPL-84229
BUG=234891437
BUG=235170159

Problem:
Connecting HDMI after 15+ seconds of device boot gives only green screen

Solution:
create new branch

Verify:
local

Signed-off-by: lele.liu <lele.liu@amlogic.com>
Change-Id: I3addbf52a0ffe2f4b101bc06a71e9c2ee9afcc9c

diff --git a/drivers/amlogic/media/enhancement/amvecm/amcsc.c b/drivers/amlogic/media/enhancement/amvecm/amcsc.c
index 6df29fc6df480afaceca2b8f0ce7546840f60c4e..3f2af0789746cb192c501f74a4673caf6486c2ac 100644 (file)
--- a/drivers/amlogic/media/enhancement/amvecm/amcsc.c
+++ b/drivers/amlogic/media/enhancement/amvecm/amcsc.c
@@ -3640,7 +3640,7 @@ static int src_timing_outputmode_changed(struct vframe_s *vf,
 {
        unsigned int width, height;
 
-       if (vinfo->viu_color_fmt == COLOR_FMT_RGB444)
+       if (vinfo_lcd_support())
                return 0;
 
        width = (vf->type & VIDTYPE_COMPRESS) ?
@@ -4837,7 +4837,7 @@ static void vpp_lut_curve_set(enum vpp_lut_sel_e lut_sel,
 {
        if (lut_sel == VPP_LUT_EOTF) {
                /* eotf lut 2048 */
-               if (vinfo->viu_color_fmt != COLOR_FMT_RGB444) {
+               if (!vinfo_lcd_support()) {
                        if (video_lut_swtich == 1)
                                /*350nit alpha_low = 0.12; */
                                set_vpp_lut(VPP_LUT_EOTF,
@@ -4882,7 +4882,7 @@ static void vpp_lut_curve_set(enum vpp_lut_sel_e lut_sel,
                                CSC_ON);
        } else if (lut_sel == VPP_LUT_OETF) {
                /* oetf lut bypass */
-               if (vinfo->viu_color_fmt != COLOR_FMT_RGB444) {
+               if (!vinfo_lcd_support()) {
                        if (video_lut_swtich == 1)
                                set_vpp_lut(VPP_LUT_OETF,
                                        oetf_289_gamma22_mapping_level1_box,
@@ -5158,7 +5158,7 @@ static int hdr_process(
                vpp_lut_curve_set(VPP_LUT_OETF, vinfo);
 
                /* xvyccc matrix3: bypass */
-               if (vinfo->viu_color_fmt != COLOR_FMT_RGB444)
+               if (!vinfo_lcd_support())
                        set_vpp_matrix(VPP_MATRIX_XVYCC,
                                RGB709_to_YUV709l_coeff,
                                CSC_ON);
@@ -5179,7 +5179,7 @@ static int hdr_process(
                /* xvyccc matrix3: RGB to YUV */
                /* other cases */
                /* xvyccc matrix3: bypass */
-               if ((vinfo->viu_color_fmt != COLOR_FMT_RGB444) &&
+               if ((!vinfo_lcd_support()) &&
                        (get_cpu_type() == MESON_CPU_MAJOR_ID_GXTVBB))
                        vpp_set_matrix3(CSC_ON, VPP_MATRIX_RGB_YUV709);
                else
@@ -5438,7 +5438,7 @@ static int hlg_process(
                        CSC_ON);
 
                /* xvyccc matrix3: bypass */
-               if (vinfo->viu_color_fmt != COLOR_FMT_RGB444)
+               if (!vinfo_lcd_support())
                        set_vpp_matrix(VPP_MATRIX_XVYCC,
                                RGB709_to_YUV709l_coeff,
                                CSC_ON);
@@ -5459,7 +5459,7 @@ static int hlg_process(
                /* xvyccc matrix3: RGB to YUV */
                /* other cases */
                /* xvyccc matrix3: bypass */
-               if ((vinfo->viu_color_fmt != COLOR_FMT_RGB444) &&
+               if ((!vinfo_lcd_support()) &&
                        (get_cpu_type() == MESON_CPU_MAJOR_ID_GXTVBB))
                        vpp_set_matrix3(CSC_ON, VPP_MATRIX_RGB_YUV709);
                else
@@ -5532,7 +5532,7 @@ static void bypass_hdr_process(
                if ((csc_type == VPP_MATRIX_BT2020YUV_BT2020RGB) &&
                        ((sink_hdr_support(vinfo) &
                        (HDR_SUPPORT | HLG_SUPPORT)) &&
-                       (vinfo->viu_color_fmt != COLOR_FMT_RGB444))) {
+                       (!vinfo_lcd_support()))) {
                        if (get_hdr_type() & HLG_FLAG)
                                hdr_func(OSD1_HDR,
                                         SDR_HLG | hdr_ex, vinfo, NULL);
@@ -5555,7 +5555,7 @@ static void bypass_hdr_process(
                /*(VIU_OSD1_BLK0_CFG_W0,0, 7, 1);*/
                if ((csc_type == VPP_MATRIX_BT2020YUV_BT2020RGB) &&
                        ((sink_hdr_support(vinfo) & HDR_SUPPORT) &&
-                       (vinfo->viu_color_fmt != COLOR_FMT_RGB444))) {
+                       (!vinfo_lcd_support()))) {
                        /* OSD convert to HDR to match HDR video */
                        /* osd eotf lut 709 */
                        if (get_hdr_type() & HLG_FLAG) {
@@ -5703,7 +5703,7 @@ static void bypass_hdr_process(
                                bypass_coeff,
                                CSC_OFF);       /* limit->limit range */
                else {
-                       if (vinfo->viu_color_fmt == COLOR_FMT_RGB444) {
+                       if (vinfo_lcd_support()) {
                                if (signal_range == 0) {/* limit range */
                                        if (csc_type == VPP_MATRIX_YUV601_RGB)
                                                set_vpp_matrix(VPP_MATRIX_VD1,
@@ -5751,7 +5751,7 @@ static void bypass_hdr_process(
                }
 
                /* post matrix bypass */
-               if (vinfo->viu_color_fmt != COLOR_FMT_RGB444)
+               if (!vinfo_lcd_support())
                        /* yuv2rgb for eye protect mode */
                        set_vpp_matrix(VPP_MATRIX_POST,
                                bypass_coeff,
@@ -5803,7 +5803,7 @@ static void bypass_hdr_process(
                        CSC_OFF);
 
                /* xvycc matrix full2limit or bypass */
-               if (vinfo->viu_color_fmt != COLOR_FMT_RGB444) {
+               if (!vinfo_lcd_support()) {
                        if (csc_type == VPP_MATRIX_BT2020YUV_BT2020RGB)
                                set_vpp_matrix(VPP_MATRIX_XVYCC,
                                        bypass_coeff,
@@ -5857,7 +5857,7 @@ static void bypass_hdr_process(
                /* xvyccc matrix3: RGB to YUV */
                /* other cases */
                /* xvyccc matrix3: bypass */
-               if ((vinfo->viu_color_fmt != COLOR_FMT_RGB444) &&
+               if ((!vinfo_lcd_support()) &&
                        (get_cpu_type() == MESON_CPU_MAJOR_ID_GXTVBB))
                        vpp_set_matrix3(CSC_ON, VPP_MATRIX_RGB_YUV709);
                else
@@ -5905,7 +5905,7 @@ static void set_bt2020csc_process(
                /*(VIU_OSD1_BLK0_CFG_W0,0, 7, 1);*/
                if ((csc_type == VPP_MATRIX_BT2020YUV_BT2020RGB) &&
                        ((sink_hdr_support(vinfo) & HDR_SUPPORT) &&
-                       (vinfo->viu_color_fmt != COLOR_FMT_RGB444))) {
+                       (!vinfo_lcd_support()))) {
                        /* OSD convert to HDR to match HDR video */
                        /* osd eotf lut 709 */
                        if (get_hdr_type() & HLG_FLAG)
@@ -6010,7 +6010,7 @@ static void set_bt2020csc_process(
                                bypass_coeff,
                                CSC_OFF);       /* limit->limit range */
                else {
-                       if (vinfo->viu_color_fmt == COLOR_FMT_RGB444) {
+                       if (vinfo_lcd_support()) {
                                if (signal_range == 0) {/* limit range */
                                        if (csc_type == VPP_MATRIX_YUV601_RGB)
                                                set_vpp_matrix(VPP_MATRIX_VD1,
@@ -6058,7 +6058,7 @@ static void set_bt2020csc_process(
                }
 
                /* post matrix bypass */
-               if (vinfo->viu_color_fmt != COLOR_FMT_RGB444)
+               if (!vinfo_lcd_support())
                        /* yuv2rgb for eye protect mode */
                        set_vpp_matrix(VPP_MATRIX_POST,
                                YUV709l_to_YUV2020_coeff,
@@ -6110,7 +6110,7 @@ static void set_bt2020csc_process(
                        CSC_OFF);
 
                /* xvycc matrix full2limit or bypass */
-               if (vinfo->viu_color_fmt != COLOR_FMT_RGB444) {
+               if (!vinfo_lcd_support()) {
                        if (csc_type == VPP_MATRIX_BT2020YUV_BT2020RGB)
                                set_vpp_matrix(VPP_MATRIX_XVYCC,
                                        bypass_coeff,
@@ -6158,7 +6158,7 @@ static void set_bt2020csc_process(
                /* xvyccc matrix3: RGB to YUV */
                /* other cases */
                /* xvyccc matrix3: bypass */
-               if ((vinfo->viu_color_fmt != COLOR_FMT_RGB444) &&
+               if ((!vinfo_lcd_support()) &&
                        (get_cpu_type() == MESON_CPU_MAJOR_ID_GXTVBB))
                        vpp_set_matrix3(CSC_ON, VPP_MATRIX_RGB_YUV709);
                else
@@ -6215,7 +6215,7 @@ static void hlg_hdr_process(
                /* 0, 7, 1); */
                if ((csc_type == VPP_MATRIX_BT2020YUV_BT2020RGB) &&
                        ((sink_hdr_support(vinfo) & HDR_SUPPORT) &&
-                       (vinfo->viu_color_fmt != COLOR_FMT_RGB444))) {
+                       (!vinfo_lcd_support()))) {
                        /* OSD convert to HDR to match HDR video */
                        /* osd eotf lut 709 */
                        if (get_hdr_type() & HLG_FLAG)
@@ -6341,7 +6341,7 @@ static void hlg_hdr_process(
                        CSC_ON);
 
                /* post matrix bypass */
-               if (vinfo->viu_color_fmt != COLOR_FMT_RGB444)
+               if (!vinfo_lcd_support())
                        /* yuv2rgb for eye protect mode */
                        set_vpp_matrix(VPP_MATRIX_POST,
                                YUV2020l_to_RGB2020_coeff,
@@ -6371,7 +6371,7 @@ static void hlg_hdr_process(
                        CSC_ON);
 
                /* xvycc matrix full2limit or bypass */
-               if (vinfo->viu_color_fmt != COLOR_FMT_RGB444) {
+               if (!vinfo_lcd_support()) {
                        if (csc_type == VPP_MATRIX_BT2020YUV_BT2020RGB)
                                set_vpp_matrix(VPP_MATRIX_XVYCC,
                                        RGB2020_to_YUV2020l_coeff,
@@ -6425,7 +6425,7 @@ static void hlg_hdr_process(
                /* xvyccc matrix3: RGB to YUV */
                /* other cases */
                /* xvyccc matrix3: bypass */
-               if ((vinfo->viu_color_fmt != COLOR_FMT_RGB444) &&
+               if ((!vinfo_lcd_support()) &&
                        (get_cpu_type() == MESON_CPU_MAJOR_ID_GXTVBB))
                        vpp_set_matrix3(CSC_ON, VPP_MATRIX_RGB_YUV709);
                else
@@ -6442,7 +6442,7 @@ static void sdr_hdr_process(
        enum vd_path_e vd_path,
        enum hdr_type_e *source_type)
 {
-       if (vinfo->viu_color_fmt != COLOR_FMT_RGB444) {
+       if (!vinfo_lcd_support()) {
                if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) {
                        if (vd_path == VD1_PATH)
                                hdr_func(VD1_HDR,
@@ -6560,7 +6560,7 @@ static int vpp_eye_protection_process(
                        sdr_process_mode[vd_path])
                return 0;
 
-       if (vinfo->viu_color_fmt == COLOR_FMT_RGB444)
+       if (vinfo_lcd_support())
                return 0;
        /* post matrix bypass */
 
@@ -6667,10 +6667,10 @@ static void hdr_support_process(struct vinfo_s *vinfo, enum vd_path_e vd_path)
        if (sdr_mode == 2) { /* auto */
                if ((sink_hdr_support(vinfo) & HDR_SUPPORT) &&
                ((cpu_after_eq(MESON_CPU_MAJOR_ID_GXL)) &&
-                (vinfo->viu_color_fmt != COLOR_FMT_RGB444)))
+                (!vinfo_lcd_support())))
                        /*box sdr->hdr*/
                        sdr_process_mode[vd_path] = PROC_SDR_TO_HDR;
-               else if ((vinfo->viu_color_fmt == COLOR_FMT_RGB444) &&
+               else if ((vinfo_lcd_support()) &&
                        ((get_cpu_type() == MESON_CPU_MAJOR_ID_GXTVBB) ||
                        (get_cpu_type() == MESON_CPU_MAJOR_ID_TXL)))
                        /*tv sdr->hdr*/
@@ -6707,7 +6707,7 @@ static int sink_support_hlg(const struct vinfo_s *vinfo)
 static int sink_support_hdr10_plus(const struct vinfo_s *vinfo)
 {
        /* panel output and TL1 and TM2 */
-       if ((vinfo->viu_color_fmt == COLOR_FMT_RGB444) &&
+       if ((vinfo_lcd_support()) &&
            ((get_cpu_type() == MESON_CPU_MAJOR_ID_TL1) ||
            (get_cpu_type() == MESON_CPU_MAJOR_ID_TM2)))
                return 1;
@@ -7025,7 +7025,7 @@ static void hdr_tx_pkt_cb(
        if (vinfo->vout_device)
                vdev = vinfo->vout_device;
 
-       if ((vinfo->viu_color_fmt != COLOR_FMT_RGB444) &&
+       if ((!vinfo_lcd_support()) &&
                ((sink_hdr_support(vinfo) &
                (HDR_SUPPORT | HLG_SUPPORT)) ||
                (signal_change_flag & SIG_HDR_SUPPORT) ||
@@ -7457,7 +7457,7 @@ static void video_process(
        }
 
        if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) {
-               if (vinfo->viu_color_fmt != COLOR_FMT_RGB444)
+               if (!vinfo_lcd_support())
                        mtx_setting(POST2_MTX, MATRIX_NULL, MTX_OFF);
                else {
                        if (vf && vf->type & VIDTYPE_RGB_444 &&
@@ -8011,7 +8011,7 @@ int amvecm_matrix_process(
                /* gxl handle sdr_mode change bug fix. */
                if ((sink_hdr_support(vinfo) & HDR_SUPPORT) &&
                    !cpu_after_eq(MESON_CPU_MAJOR_ID_G12A) &&
-                   vinfo->viu_color_fmt != COLOR_FMT_RGB444) {
+                   !vinfo_lcd_support()) {
                        if (sdr_mode != cur_sdr_mode) {
                                force_fake = true;
                                cur_sdr_mode = sdr_mode;
@@ -8024,7 +8024,7 @@ int amvecm_matrix_process(
                if (is_video_layer_on(vd_path) &&
                    (sink_hdr_support(vinfo) & HDR_SUPPORT) &&
                    ((cpu_after_eq(MESON_CPU_MAJOR_ID_GXL)) &&
-                    (vinfo->viu_color_fmt != COLOR_FMT_RGB444))) {
+                    (!vinfo_lcd_support()))) {
                        if (cpu_after_eq(MESON_CPU_MAJOR_ID_G12A)) {
                                if (sdr_mode != cur_sdr_mode) {
                                        null_vf_cnt[vd_path] = 0;

diff --git a/drivers/amlogic/media/enhancement/amvecm/amcsc_pip.c b/drivers/amlogic/media/enhancement/amvecm/amcsc_pip.c
index 2bacec42f32a0c9f01ec98a8e91449764ebe32e9..386e94e57553aa41de47313f296eb31d9c15264d 100644 (file)
--- a/drivers/amlogic/media/enhancement/amvecm/amcsc_pip.c
+++ b/drivers/amlogic/media/enhancement/amvecm/amcsc_pip.c
@@ -1358,7 +1358,7 @@ void video_post_process(
        }
 
        if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) {
-               if (vinfo->viu_color_fmt != COLOR_FMT_RGB444) {
+               if (!vinfo_lcd_support()) {
                        mtx_setting(POST2_MTX, MATRIX_NULL, MTX_OFF);
                } else {
                        if ((vf && vf->type & VIDTYPE_RGB_444) &&

diff --git a/drivers/amlogic/media/enhancement/amvecm/amve.c b/drivers/amlogic/media/enhancement/amvecm/amve.c
index 6bd65671675ff819d543d37e88f651cc3a6a05e9..541fdeab917205b338532875c1d8f4af431180a7 100644 (file)
--- a/drivers/amlogic/media/enhancement/amvecm/amve.c
+++ b/drivers/amlogic/media/enhancement/amvecm/amve.c
@@ -189,7 +189,6 @@ void ve_dnlp_load_reg(void)
        int i;
        int offset = 0;
        int dnlp_reg = 0;
-       struct vinfo_s *vinfo = get_current_vinfo();
 
        if (cpu_after_eq(MESON_CPU_MAJOR_ID_TM2)) {
                if (is_meson_rev_a() && is_meson_tm2_cpu())
@@ -205,7 +204,7 @@ void ve_dnlp_load_reg(void)
                                WRITE_VPP_REG(SRSHARP1_DNLP_00 + i,
                                        ve_dnlp_reg[i]);
                } else if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
-                       if (vinfo->viu_color_fmt != COLOR_FMT_RGB444)
+                       if (!vinfo_lcd_support())
                                dnlp_reg = SHARP0_DNLP_00 + offset;
                        else
                                dnlp_reg = SHARP1_DNLP_00 + offset;
@@ -232,7 +231,6 @@ static void ve_dnlp_load_def_reg(void)
        int i;
        int offset = 0;
        int dnlp_reg = 0;
-       struct vinfo_s *vinfo = get_current_vinfo();
 
        if (cpu_after_eq(MESON_CPU_MAJOR_ID_TM2)) {
                if (is_meson_rev_a() && is_meson_tm2_cpu())
@@ -248,7 +246,7 @@ static void ve_dnlp_load_def_reg(void)
                                WRITE_VPP_REG(SRSHARP1_DNLP_00 + i,
                                        ve_dnlp_reg[i]);
                } else if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
-                       if (vinfo->viu_color_fmt != COLOR_FMT_RGB444)
+                       if (!vinfo_lcd_support())
                                dnlp_reg = SHARP0_DNLP_00 + offset;
                        else
                                dnlp_reg = SHARP1_DNLP_00 + offset;
@@ -530,7 +528,7 @@ void vpp_set_rgb_ogo(struct tcon_rgb_ogo_s *p)
 {
        int m[24];
        int i;
-       struct vinfo_s *vinfo = get_current_vinfo();
+
        /* write to registers */
        if (video_rgb_ogo_xvy_mtx) {
                if (video_rgb_ogo_xvy_mtx_latch & MTX_BYPASS_RGB_OGO) {
@@ -552,7 +550,7 @@ void vpp_set_rgb_ogo(struct tcon_rgb_ogo_s *p)
                m[10] = p->g_gain * m[10] / COEFF_NORM(1.0);
                m[11] = p->b_gain * m[11] / COEFF_NORM(1.0);
 
-               if (vinfo->viu_color_fmt == COLOR_FMT_RGB444) {
+               if (vinfo_lcd_support()) {
                        m[18] = (p->r_pre_offset + m[18] + 1024)
                                * p->r_gain / COEFF_NORM(1.0)
                                - p->r_gain + p->r_post_offset;
@@ -707,14 +705,13 @@ void vpp_set_rgb_ogo(struct tcon_rgb_ogo_s *p)
 
 void ve_enable_dnlp(void)
 {
-       struct vinfo_s *vinfo = get_current_vinfo();
 
        ve_en = 1;
        if (dnlp_sel == NEW_DNLP_IN_SHARPNESS) {
                if (is_meson_gxlx_cpu() || is_meson_txlx_cpu()) {
                        WRITE_VPP_REG_BITS(SRSHARP1_DNLP_EN, 1, 0, 1);
                } else if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
-                       if (vinfo->viu_color_fmt != COLOR_FMT_RGB444)
+                       if (!vinfo_lcd_support())
                                WRITE_VPP_REG_BITS(
                                        SRSHARP0_DNLP_EN + sr_offset[0],
                                        1, 0, 1);
@@ -733,14 +730,13 @@ void ve_enable_dnlp(void)
 
 void ve_disable_dnlp(void)
 {
-       struct vinfo_s *vinfo = get_current_vinfo();
 
        ve_en = 0;
        if (dnlp_sel == NEW_DNLP_IN_SHARPNESS) {
                if (is_meson_gxlx_cpu() || is_meson_txlx_cpu()) {
                        WRITE_VPP_REG_BITS(SRSHARP1_DNLP_EN, 0, 0, 1);
                } else if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
-                       if (vinfo->viu_color_fmt != COLOR_FMT_RGB444)
+                       if (!vinfo_lcd_support())
                                WRITE_VPP_REG_BITS(
                                        SRSHARP0_DNLP_EN + sr_offset[0],
                                        0, 0, 1);

diff --git a/drivers/amlogic/media/enhancement/amvecm/amvecm.c b/drivers/amlogic/media/enhancement/amvecm/amvecm.c
index 12071d68cbc098af429c668ec075e9659757966f..c2479925067851527074f42867adcaadccbe8c65 100644 (file)
--- a/drivers/amlogic/media/enhancement/amvecm/amvecm.c
+++ b/drivers/amlogic/media/enhancement/amvecm/amvecm.c
@@ -7357,14 +7357,24 @@ void init_pq_control(unsigned int enable)
                        sizeof(struct pq_ctrl_s));
        }
 }
-/* #if (MESON_CPU_TYPE == MESON_CPU_TYPE_MESONG9TV) */
-void init_pq_setting(void)
+
+int vinfo_lcd_support(void)
 {
        struct vinfo_s *vinfo = get_current_vinfo();
 
+       if (vinfo->mode == VMODE_LCD ||
+               vinfo->mode == VMODE_DUMMY_ENCP)
+               return 1;
+       else
+               return 0;
+}
+
+/* #if (MESON_CPU_TYPE == MESON_CPU_TYPE_MESONG9TV) */
+void init_pq_setting(void)
+{
        int bitdepth;
 
-       if (vinfo->viu_color_fmt == COLOR_FMT_RGB444)
+       if (vinfo_lcd_support())
                init_pq_control(PQ_TV);
        else
                init_pq_control(PQ_BOX);

diff --git a/include/linux/amlogic/media/amvecm/amvecm.h b/include/linux/amlogic/media/amvecm/amvecm.h
index 1be65ddac3bf71eaa4290ccbeeba2b866bf0995d..ca1c1634dadffa4f72bc5bf866f9575722b268e5 100644 (file)
--- a/include/linux/amlogic/media/amvecm/amvecm.h
+++ b/include/linux/amlogic/media/amvecm/amvecm.h
@@ -597,6 +597,7 @@ extern int am_meson_ctm_disable(void);
 extern void enable_osd1_mtx(unsigned int en);
 void set_cur_hdr_policy(uint policy);
 u32 hdr_set(u32 module_sel, u32 hdr_process_select);
+int vinfo_lcd_support(void);
 int dv_pq_ctl(enum dv_pq_ctl_e ctl);
 #endif /* AMVECM_H */