staging: rts_pstor: modify initial card clock
authorwwang <wei_wang@realsil.com.cn>
Tue, 15 Mar 2011 08:22:06 +0000 (16:22 +0800)
committerGreg Kroah-Hartman <gregkh@suse.de>
Tue, 5 Apr 2011 04:33:26 +0000 (21:33 -0700)
Modify initial card clock to avoid over spec

Signed-off-by: wwang <wei_wang@realsil.com.cn>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
drivers/staging/rts_pstor/rtsx.c

index 4514419a5fb88e56f9083023bb603867d0b27bbf..02525d57ba83c8bb5278200baaed59b267bc6a0b 100644 (file)
@@ -824,13 +824,13 @@ static void rtsx_init_options(struct rtsx_chip *chip)
        chip->fpga_ms_hg_clk = CLK_80;
        chip->fpga_ms_4bit_clk = CLK_80;
        chip->fpga_ms_1bit_clk = CLK_40;
-       chip->asic_sd_sdr104_clk = 207;
-       chip->asic_sd_sdr50_clk = 99;
-       chip->asic_sd_ddr50_clk = 99;
-       chip->asic_sd_hs_clk = 99;
-       chip->asic_mmc_52m_clk = 99;
-       chip->asic_ms_hg_clk = 119;
-       chip->asic_ms_4bit_clk = 79;
+       chip->asic_sd_sdr104_clk = 203;
+       chip->asic_sd_sdr50_clk = 98;
+       chip->asic_sd_ddr50_clk = 98;
+       chip->asic_sd_hs_clk = 98;
+       chip->asic_mmc_52m_clk = 98;
+       chip->asic_ms_hg_clk = 117;
+       chip->asic_ms_4bit_clk = 78;
        chip->asic_ms_1bit_clk = 39;
        chip->ssc_depth_sd_sdr104 = SSC_DEPTH_2M;
        chip->ssc_depth_sd_sdr50 = SSC_DEPTH_2M;