ARM: dts: am4372: Set the default clock rate for dpll_clksel_mac_clk clock

cpsw needs the clock to be running at 50MHz in kernel. Hence setting
the default rate.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>

diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index ade28c790f4bf6abfbb17de0aaee768e8f324837..8091af6a99c3b71ce4aea89cb95d28ba991c2a44 100644 (file)
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -527,8 +527,11 @@
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ti,hwmods = "cpgmac0";
-                       clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
-                       clock-names = "fck", "cpts";
+                       clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>,
+                                <&dpll_clksel_mac_clk>;
+                       clock-names = "fck", "cpts", "50mclk";
+                       assigned-clocks = <&dpll_clksel_mac_clk>;
+                       assigned-clock-rates = <50000000>;
                        status = "disabled";
                        cpdma_channels = <8>;
                        ale_entries = <1024>;