Move struct definitions for dig_t and ps_t to the common header file.
This move is needed to convert these structures from a "per-driver" to a
"per-interface" basis.
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67
-struct ps_t {
- u8 pre_ccastate;
- u8 cur_ccasate;
- u8 pre_rfstate;
- u8 cur_rfstate;
- long rssi_val_min;
-};
-
-struct dig_t {
- u8 dig_enable_flag;
- u8 dig_ext_port_stage;
- u32 rssi_lowthresh;
- u32 rssi_highthresh;
- u32 fa_lowthresh;
- u32 fa_highthresh;
- u8 cursta_connectctate;
- u8 presta_connectstate;
- u8 curmultista_connectstate;
- u8 pre_igvalue;
- u8 cur_igvalue;
- char backoff_val;
- char backoff_val_range_max;
- char backoff_val_range_min;
- u8 rx_gain_range_max;
- u8 rx_gain_range_min;
- u8 rssi_val_min;
- u8 pre_cck_pd_state;
- u8 cur_cck_pd_state;
- u8 pre_cck_fa_state;
- u8 cur_cck_fa_state;
- u8 pre_ccastate;
- u8 cur_ccasate;
-};
-
struct swat_t {
u8 failure_cnt;
u8 try_flag;
#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67
-struct ps_t {
- u8 pre_ccastate;
- u8 cur_ccasate;
- u8 pre_rfstate;
- u8 cur_rfstate;
- long rssi_val_min;
-};
-
-struct dig_t {
- u8 dig_enable_flag;
- u8 dig_ext_port_stage;
- u32 rssi_lowthresh;
- u32 rssi_highthresh;
- u32 fa_lowthresh;
- u32 fa_highthresh;
- u8 cursta_connectctate;
- u8 presta_connectstate;
- u8 curmultista_connectstate;
- u8 pre_igvalue;
- u8 cur_igvalue;
- char backoff_val;
- char backoff_val_range_max;
- char backoff_val_range_min;
- u8 rx_gain_range_max;
- u8 rx_gain_range_min;
- u8 rssi_val_min;
- u8 pre_cck_pd_state;
- u8 cur_cck_pd_state;
- u8 pre_cck_fa_state;
- u8 cur_cck_fa_state;
- u8 pre_ccastate;
- u8 cur_ccasate;
-};
-
struct swat_t {
u8 failure_cnt;
u8 try_flag;
#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67
#define INDEX_MAPPING_NUM 13
-struct ps_t {
- u8 pre_ccastate;
- u8 cur_ccasate;
-
- u8 pre_rfstate;
- u8 cur_rfstate;
-
- long rssi_val_min;
-};
-
-struct dig_t {
- u8 dig_enable_flag;
- u8 dig_ext_port_stage;
-
- u32 rssi_lowthresh;
- u32 rssi_highthresh;
-
- u32 fa_lowthresh;
- u32 fa_highthresh;
-
- u8 cursta_connectctate;
- u8 presta_connectstate;
- u8 curmultista_connectstate;
-
- u8 pre_igvalue;
- u8 cur_igvalue;
-
- char backoff_val;
- char backoff_val_range_max;
- char backoff_val_range_min;
- u8 rx_gain_range_max;
- u8 rx_gain_range_min;
- u8 min_undecorated_pwdb_for_dm;
- long last_min_undecorated_pwdb_for_dm;
-
- u8 pre_cck_pd_state;
- u8 cur_cck_pd_state;
-
- u8 pre_cck_fa_state;
- u8 cur_cck_fa_state;
-
- u8 pre_ccastate;
- u8 cur_ccasate;
-
- u8 large_fa_hit;
- u8 forbidden_igi;
- u32 recover_cnt;
-};
-
struct swat {
u8 failure_cnt;
u8 try_flag;
#ifndef __RTL_92S_DM_H__
#define __RTL_92S_DM_H__
-struct dig_t {
- u8 dig_enable_flag;
- u8 dig_algorithm;
- u8 dig_twoport_algorithm;
- u8 dig_ext_port_stage;
- u8 dig_dbgmode;
- u8 dig_slgorithm_switch;
-
- long rssi_lowthresh;
- long rssi_highthresh;
-
- u32 fa_lowthresh;
- u32 fa_highthresh;
-
- long rssi_highpower_lowthresh;
- long rssi_highpower_highthresh;
-
- u8 dig_state;
- u8 dig_highpwrstate;
- u8 cur_sta_connectstate;
- u8 pre_sta_connectstate;
- u8 cur_ap_connectstate;
- u8 pre_ap_connectstate;
-
- u8 cur_pd_thstate;
- u8 pre_pd_thstate;
- u8 cur_cs_ratiostate;
- u8 pre_cs_ratiostate;
-
- u32 pre_igvalue;
- u32 cur_igvalue;
-
- u8 backoff_enable_flag;
- char backoff_val;
- char backoffval_range_max;
- char backoffval_range_min;
- u8 rx_gain_range_max;
- u8 rx_gain_range_min;
-
- long rssi_val;
-};
-
enum dm_dig_alg {
DIG_ALGO_BY_FALSE_ALARM = 0,
DIG_ALGO_BY_RSSI = 1,
char proc_name[20];
};
+struct ps_t {
+ u8 pre_ccastate;
+ u8 cur_ccasate;
+ u8 pre_rfstate;
+ u8 cur_rfstate;
+ long rssi_val_min;
+};
+
+struct dig_t {
+ u32 rssi_lowthresh;
+ u32 rssi_highthresh;
+ u32 fa_lowthresh;
+ u32 fa_highthresh;
+ long last_min_undecorated_pwdb_for_dm;
+ long rssi_highpower_lowthresh;
+ long rssi_highpower_highthresh;
+ u32 recover_cnt;
+ u32 pre_igvalue;
+ u32 cur_igvalue;
+ long rssi_val;
+ u8 dig_enable_flag;
+ u8 dig_ext_port_stage;
+ u8 dig_algorithm;
+ u8 dig_twoport_algorithm;
+ u8 dig_dbgmode;
+ u8 dig_slgorithm_switch;
+ u8 cursta_connectctate;
+ u8 presta_connectstate;
+ u8 curmultista_connectstate;
+ char backoff_val;
+ char backoff_val_range_max;
+ char backoff_val_range_min;
+ u8 rx_gain_range_max;
+ u8 rx_gain_range_min;
+ u8 min_undecorated_pwdb_for_dm;
+ u8 rssi_val_min;
+ u8 pre_cck_pd_state;
+ u8 cur_cck_pd_state;
+ u8 pre_cck_fa_state;
+ u8 cur_cck_fa_state;
+ u8 pre_ccastate;
+ u8 cur_ccasate;
+ u8 large_fa_hit;
+ u8 forbidden_igi;
+ u8 dig_state;
+ u8 dig_highpwrstate;
+ u8 cur_sta_connectstate;
+ u8 pre_sta_connectstate;
+ u8 cur_ap_connectstate;
+ u8 pre_ap_connectstate;
+ u8 cur_pd_thstate;
+ u8 pre_pd_thstate;
+ u8 cur_cs_ratiostate;
+ u8 pre_cs_ratiostate;
+ u8 backoff_enable_flag;
+ char backoffval_range_max;
+ char backoffval_range_min;
+};
+
struct rtl_priv {
struct completion firmware_loading_complete;
struct rtl_locks locks;