ARM: dts: add exynos5422-cpus.dtsi to correct cpu order

The odroid-xu3 board which is based on exynos5422 not exynos5800
is booted from cortex-a7 core unlike exynos5800. The odroid-xu3's
cpu order is quite strange. cpu0 and cpu5-7 are cortex-a7 cores and
cpu1-4 are cortex-a15 cores. To correct this mis-odering, I added
exynos5422-cpus.dtsi and reversing cpu orders from exynos5420.
Now, cpu0-3 are cortex-a7 and cpu4-7 are cortex-a15.

Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Chanho Park <parkch98@gmail.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>

diff --git a/arch/arm/boot/dts/exynos5422-cpus.dtsi b/arch/arm/boot/dts/exynos5422-cpus.dtsi
new file mode 100644 (file)
index 0000000..b7f60c8
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5422-cpus.dtsi
@@ -0,0 +1,81 @@
+/*
+ * SAMSUNG EXYNOS5422 SoC cpu device tree source
+ *
+ * Copyright (c) 2015 Samsung Electronics Co., Ltd.
+ *             http://www.samsung.com
+ *
+ * The only difference between EXYNOS5422 and EXYNOS5800 is cpu ordering. The
+ * EXYNOS5422 is booting from Cortex-A7 core while the EXYNOS5800 is booting
+ * from Cortex-A15 core.
+ *
+ * EXYNOS5422 based board files can include this file to provide cpu ordering
+ * which could boot a cortex-a7 from cpu0.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+&cpu0 {
+       device_type = "cpu";
+       compatible = "arm,cortex-a7";
+       reg = <0x100>;
+       clock-frequency = <1000000000>;
+       cci-control-port = <&cci_control0>;
+};
+
+&cpu1 {
+       device_type = "cpu";
+       compatible = "arm,cortex-a7";
+       reg = <0x101>;
+       clock-frequency = <1000000000>;
+       cci-control-port = <&cci_control0>;
+};
+
+&cpu2 {
+       device_type = "cpu";
+       compatible = "arm,cortex-a7";
+       reg = <0x102>;
+       clock-frequency = <1000000000>;
+       cci-control-port = <&cci_control0>;
+};
+
+&cpu3 {
+       device_type = "cpu";
+       compatible = "arm,cortex-a7";
+       reg = <0x103>;
+       clock-frequency = <1000000000>;
+       cci-control-port = <&cci_control0>;
+};
+
+&cpu4 {
+       device_type = "cpu";
+       compatible = "arm,cortex-a15";
+       reg = <0x0>;
+       clock-frequency = <1800000000>;
+       cci-control-port = <&cci_control1>;
+};
+
+&cpu5 {
+       device_type = "cpu";
+       compatible = "arm,cortex-a15";
+       reg = <0x1>;
+       clock-frequency = <1800000000>;
+       cci-control-port = <&cci_control1>;
+};
+
+&cpu6 {
+       device_type = "cpu";
+       compatible = "arm,cortex-a15";
+       reg = <0x2>;
+       clock-frequency = <1800000000>;
+       cci-control-port = <&cci_control1>;
+};
+
+&cpu7 {
+       device_type = "cpu";
+       compatible = "arm,cortex-a15";
+       reg = <0x3>;
+       clock-frequency = <1800000000>;
+       cci-control-port = <&cci_control1>;
+};

diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
index 1565667e6f699d171aa769a904a5993698c5203f..79ffdfe712aa4a8ad193d4afd671962edfb73646 100644 (file)
--- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
@@ -15,6 +15,7 @@
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/sound/samsung-i2s.h>
 #include "exynos5800.dtsi"
+#include "exynos5422-cpus.dtsi"
 #include "exynos5422-cpu-thermal.dtsi"
 
 / {