T104xRDB: Add qe node to t104xrdb
authorZhao Qiang <qiang.zhao@nxp.com>
Tue, 17 May 2016 02:39:02 +0000 (10:39 +0800)
committerScott Wood <oss@buserror.net>
Sat, 9 Jul 2016 06:12:04 +0000 (01:12 -0500)
add qe node to t104xrdb.dtsi

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: Scott Wood <oss@buserror.net>
arch/powerpc/boot/dts/fsl/t104xrdb.dtsi

index 7c4afdb44b4628104d06977daa02f5d7fb3a6e8b..5fdddbd2a62b29df17994e8b45e70e82c0e4d4f1 100644 (file)
                                  0 0x00010000>;
                };
        };
+
+       qe: qe@ffe140000 {
+               ranges = <0x0 0xf 0xfe140000 0x40000>;
+               reg = <0xf 0xfe140000 0 0x480>;
+               brg-frequency = <0>;
+               bus-frequency = <0>;
+
+               si1: si@700 {
+                       compatible = "fsl,t1040-qe-si";
+                       reg = <0x700 0x80>;
+               };
+
+               siram1: siram@1000 {
+                       compatible = "fsl,t1040-qe-siram";
+                       reg = <0x1000 0x800>;
+               };
+
+               ucc_hdlc: ucc@2000 {
+                       compatible = "fsl,ucc-hdlc";
+                       rx-clock-name = "clk8";
+                       tx-clock-name = "clk9";
+                       fsl,rx-sync-clock = "rsync_pin";
+                       fsl,tx-sync-clock = "tsync_pin";
+                       fsl,tx-timeslot-mask = <0xfffffffe>;
+                       fsl,rx-timeslot-mask = <0xfffffffe>;
+                       fsl,tdm-framer-type = "e1";
+                       fsl,tdm-id = <0>;
+                       fsl,siram-entry-id = <0>;
+                       fsl,tdm-interface;
+               };
+
+               ucc_serial: ucc@2200 {
+                       compatible = "fsl,t1040-ucc-uart";
+                       port-number = <0>;
+                       rx-clock-name = "brg2";
+                       tx-clock-name = "brg2";
+               };
+       };
 };