arm64: dts: uniphier: add STDMAC clock to EHCI nodes

Without the STDMAC clock enabled, the USB 2.0 hosts do not work.
This clock must be explicitly listed in the "clocks" property because
it is independent of the other clocks.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
index ee4aff53a5f5dc8063bf0779e23da47fe5f4e522..09c429cb6d6167454d3fbe988aa1945242f8018f 100644 (file)
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
@@ -299,7 +299,8 @@
                        interrupts = <0 243 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_usb0>;
-                       clocks = <&mio_clk 7>, <&mio_clk 8>, <&mio_clk 12>;
+                       clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>,
+                                <&mio_clk 12>;
                        resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>,
                                 <&mio_rst 12>;
                };
@@ -311,7 +312,8 @@
                        interrupts = <0 244 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_usb1>;
-                       clocks = <&mio_clk 7>, <&mio_clk 9>, <&mio_clk 13>;
+                       clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>,
+                                <&mio_clk 13>;
                        resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>,
                                 <&mio_rst 13>;
                };
@@ -323,7 +325,8 @@
                        interrupts = <0 245 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_usb2>;
-                       clocks = <&mio_clk 7>, <&mio_clk 10>, <&mio_clk 14>;
+                       clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 10>,
+                                <&mio_clk 14>;
                        resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>,
                                 <&mio_rst 14>;
                };