drm/amdgpu: add flags for amdgpu_ib structure
authorJammy Zhou <Jammy.Zhou@amd.com>
Mon, 11 May 2015 15:41:41 +0000 (23:41 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 4 Jun 2015 01:03:30 +0000 (21:03 -0400)
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu.h
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

index a88302c0c93a44e75b0ca9ce191e3109f06804fc..aaa62f33870fdc482ddaeeeda80e1e12ff101619 100644 (file)
@@ -892,13 +892,12 @@ struct amdgpu_ib {
        struct amdgpu_fence             *fence;
        struct amdgpu_user_fence        *user;
        struct amdgpu_vm                *vm;
-       bool                            is_const_ib;
        bool                            flush_hdp_writefifo;
        struct amdgpu_sync              sync;
-       bool                            gds_needed;
        uint32_t                        gds_base, gds_size;
        uint32_t                        gws_base, gws_size;
        uint32_t                        oa_base, oa_size;
+       uint32_t                        flags;
 };
 
 enum amdgpu_ring_type {
index 1035e443700f7bc24a9850f69299f94b0eaa1c6a..de17f845a84b3b6660263d227777c8b04ddbc7ab 100644 (file)
@@ -638,10 +638,8 @@ static int amdgpu_cs_ib_fill(struct amdgpu_device *adev,
                }
                ib->length_dw = chunk_ib->ib_bytes / 4;
 
-               if (chunk_ib->flags & AMDGPU_IB_FLAG_CE)
-                       ib->is_const_ib = true;
-               if (chunk_ib->flags & AMDGPU_IB_FLAG_GDS)
-                       ib->gds_needed = true;
+               ib->flags = chunk_ib->flags;
+
                if ((ib->ring->current_filp != parser->filp) ||
                    (ib->ring->current_ctx != parser->ctx_id)) {
                        ib->ring->need_ctx_switch = true;
index 847cab2b3fff8e5f8f4a8522f13b4aa97b585297..a83ff03ffc80dea347baaf5c23eb52e50c6b4585 100644 (file)
@@ -88,13 +88,13 @@ int amdgpu_ib_get(struct amdgpu_ring *ring, struct amdgpu_vm *vm,
        ib->fence = NULL;
        ib->user = NULL;
        ib->vm = vm;
-       ib->is_const_ib = false;
        ib->gds_base = 0;
        ib->gds_size = 0;
        ib->gws_base = 0;
        ib->gws_size = 0;
        ib->oa_base = 0;
        ib->oa_size = 0;
+       ib->flags = 0;
 
        return 0;
 }
@@ -179,7 +179,7 @@ int amdgpu_ib_schedule(struct amdgpu_device *adev, unsigned num_ibs,
                amdgpu_vm_flush(ring, vm, ib->sync.last_vm_update);
        }
 
-       if (ring->funcs->emit_gds_switch && ib->vm && ib->gds_needed)
+       if (ring->funcs->emit_gds_switch && ib->vm && (ib->flags & AMDGPU_IB_FLAG_GDS))
                amdgpu_ring_emit_gds_switch(ring, ib->vm->ids[ring->idx].id,
                                            ib->gds_base, ib->gds_size,
                                            ib->gws_base, ib->gws_size,
index 26df23eaf09e98be8856c50d75f9f63ac6e04884..7428c4305418e1bb4c01a1c156059f3c3347c2dd 100644 (file)
@@ -2544,7 +2544,7 @@ static void gfx_v7_0_ring_emit_ib(struct amdgpu_ring *ring,
                ring->need_ctx_switch = false;
        }
 
-       if (ib->is_const_ib)
+       if (ib->flags & AMDGPU_IB_FLAG_CE)
                header = PACKET3(PACKET3_INDIRECT_BUFFER_CONST, 2);
        else
                header = PACKET3(PACKET3_INDIRECT_BUFFER, 2);
index 3762998df3518ceee561663c01068011cbbfdc2a..48de9204ff5e2f0b11b6f1ae4fa5059c4898144a 100644 (file)
@@ -3673,7 +3673,7 @@ static void gfx_v8_0_ring_emit_ib(struct amdgpu_ring *ring,
                ring->need_ctx_switch = false;
        }
 
-       if (ib->is_const_ib)
+       if (ib->flags & AMDGPU_IB_FLAG_CE)
                header = PACKET3(PACKET3_INDIRECT_BUFFER_CONST, 2);
        else
                header = PACKET3(PACKET3_INDIRECT_BUFFER, 2);