ARM: kirkwood: Fix address of second XOR engine

There appears to be an error in the second address of the second XOR
engine in the Kirkwood SoC device tree, which is specified as 0xd0b00
but should be 0x60b00.

For confirmation of address see table 581 page 658 of:

http://www.marvell.com/embedded-processors/kirkwood/assets/FS_88F6180_9x_6281_OpenSource.pdf

Also see definition of XOR1_HIGH_PHYS_BASE in
arch/arm/mach-kirkwood/include/mach/kirkwood.h

Signed-off-by: Quentin Armitage <quentin@armitage.org.uk>
Reviewed-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>

diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi
index 858099f5b966c3405ca4d2464404dc68793df331..1335b2e1bed4c66efe95ee2f679129d3856ccb43 100644 (file)
--- a/arch/arm/boot/dts/kirkwood.dtsi
+++ b/arch/arm/boot/dts/kirkwood.dtsi
@@ -168,7 +168,7 @@
                xor@60900 {
                        compatible = "marvell,orion-xor";
                        reg = <0x60900 0x100
-                              0xd0B00 0x100>;
+                              0x60B00 0x100>;
                        status = "okay";
                        clocks = <&gate_clk 16>;