ARM: dts: AM33XX: Fix uart numbering to match hardware/TRM
authorVaibhav Hiremath <hvaibhav@ti.com>
Thu, 28 Mar 2013 06:06:05 +0000 (11:36 +0530)
committerBenoit Cousson <benoit.cousson@linaro.org>
Tue, 18 Jun 2013 23:53:34 +0000 (18:53 -0500)
With DT support, where naming convention is based on base-addr
and not id, so we should follow TRM/Spec numbering label.

This patch changes UART numbering as per TRM, as uart0-5.

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Acked-by: Matt Porter <mporter@ti.com>
Cc: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
arch/arm/boot/dts/am335x-bone.dts
arch/arm/boot/dts/am335x-evm.dts
arch/arm/boot/dts/am335x-evmsk.dts
arch/arm/boot/dts/am33xx.dtsi

index 1d623e41d1630cd54630e1f54ead634550ece7bd..be2c501a0b581ff9c081699ed8d85d0b0f277aa9 100644 (file)
@@ -46,7 +46,7 @@
        };
 
        ocp {
-               uart1: serial@44e09000 {
+               uart0: serial@44e09000 {
                        status = "okay";
                };
 
index 0668843004e8fd81ec2560b4f3346522b5ed1946..f2cb19290f7a06e6739c017c98a2002f4556fa16 100644 (file)
@@ -61,7 +61,7 @@
        };
 
        ocp {
-               uart1: serial@44e09000 {
+               uart0: serial@44e09000 {
                        status = "okay";
                };
 
index 21d5a0804f6c30d95f50b3d8a15aa0360f7af808..bcd702897d5130ebbdc4f51a67e2e6b7be614eda 100644 (file)
@@ -61,7 +61,7 @@
        };
 
        ocp {
-               uart1: serial@44e09000 {
+               uart0: serial@44e09000 {
                        status = "okay";
                };
 
index 8e1248f01fab0638e3872cef25371b1a660872ea..e7cabe2c890b0f9b875d5db27f94f5948b42c8c9 100644 (file)
        interrupt-parent = <&intc>;
 
        aliases {
-               serial0 = &uart1;
-               serial1 = &uart2;
-               serial2 = &uart3;
-               serial3 = &uart4;
-               serial4 = &uart5;
-               serial5 = &uart6;
+               serial0 = &uart0;
+               serial1 = &uart1;
+               serial2 = &uart2;
+               serial3 = &uart3;
+               serial4 = &uart4;
+               serial5 = &uart5;
                d_can0 = &dcan0;
                d_can1 = &dcan1;
        };
                        interrupts = <62>;
                };
 
-               uart1: serial@44e09000 {
+               uart0: serial@44e09000 {
                        compatible = "ti,omap3-uart";
                        ti,hwmods = "uart1";
                        clock-frequency = <48000000>;
                        status = "disabled";
                };
 
-               uart2: serial@48022000 {
+               uart1: serial@48022000 {
                        compatible = "ti,omap3-uart";
                        ti,hwmods = "uart2";
                        clock-frequency = <48000000>;
                        status = "disabled";
                };
 
-               uart3: serial@48024000 {
+               uart2: serial@48024000 {
                        compatible = "ti,omap3-uart";
                        ti,hwmods = "uart3";
                        clock-frequency = <48000000>;
                        status = "disabled";
                };
 
-               uart4: serial@481a6000 {
+               uart3: serial@481a6000 {
                        compatible = "ti,omap3-uart";
                        ti,hwmods = "uart4";
                        clock-frequency = <48000000>;
                        status = "disabled";
                };
 
-               uart5: serial@481a8000 {
+               uart4: serial@481a8000 {
                        compatible = "ti,omap3-uart";
                        ti,hwmods = "uart5";
                        clock-frequency = <48000000>;
                        status = "disabled";
                };
 
-               uart6: serial@481aa000 {
+               uart5: serial@481aa000 {
                        compatible = "ti,omap3-uart";
                        ti,hwmods = "uart6";
                        clock-frequency = <48000000>;