ARM: Kirkwood: Add DT description of rd88f6192.

Mechanically translate rd88f6192-nas-setup.c into DT equivelent.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index cfd364dcf55175d4fc3af135e8ec4e1e7a62dfa3..40132ea1ac0e6d93fc850edb2787d2ff277f3361 100644 (file)
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -112,6 +112,7 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-b3.dtb \
        kirkwood-nsa310a.dtb \
        kirkwood-openblocks_a6.dtb \
        kirkwood-openblocks_a7.dtb \
+       kirkwood-rd88f6192.dtb \
        kirkwood-sheevaplug.dtb \
        kirkwood-sheevaplug-esata.dtb \
        kirkwood-topkick.dtb \

diff --git a/arch/arm/boot/dts/kirkwood-rd88f6192.dts b/arch/arm/boot/dts/kirkwood-rd88f6192.dts
new file mode 100644 (file)
index 0000000..e9dd850
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-rd88f6192.dts
@@ -0,0 +1,112 @@
+/*
+ * Marvell RD88F6192 Board descrition
+ *
+ * Andrew Lunn <andrew@lunn.ch>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ *
+ * This file contains the definitions that are common between the three
+ * variants of the Marvell Kirkwood Development Board.
+ */
+/dts-v1/;
+
+#include "kirkwood.dtsi"
+#include "kirkwood-6192.dtsi"
+
+/ {
+       model = "Marvell RD88F6192 reference design";
+       compatible = "marvell,rd88f6192", "marvell,kirkwood-88f6192", "marvell,kirkwood";
+
+       memory {
+               device_type = "memory";
+               reg = <0x00000000 0x20000000>;
+       };
+
+       chosen {
+               bootargs = "console=ttyS0,115200n8";
+       };
+
+       mbus {
+               pcie-controller {
+                       status = "okay";
+
+                       pcie@1,0 {
+                               status = "okay";
+                       };
+               };
+       };
+
+       ocp@f1000000 {
+               pinctrl: pinctrl@10000 {
+                       pinctrl-0 = <&pmx_usb_power>;
+                       pinctrl-names = "default";
+
+                        pmx_usb_power: pmx-usb-power {
+                                marvell,pins = "mpp10";
+                                marvell,function = "gpo";
+                        };
+               };
+
+               serial@12000 {
+                       status = "okay";
+
+               };
+
+               spi@10600 {
+                       status = "okay";
+                       pinctrl-0 = <&pmx_spi>;
+                       pinctrl-names = "default";
+
+                       m25p128@0 {
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               compatible = "st,m25p128";
+                               reg = <0>;
+                               spi-max-frequency = <20000000>;
+                               mode = <0>;
+                       };
+               };
+
+               sata@80000 {
+                       status = "okay";
+                       nr-ports = <2>;
+               };
+       };
+
+       regulators {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                pinctrl-0 = <&pmx_usb_power>;
+                pinctrl-names = "default";
+
+                usb_power: regulator@0 {
+                        compatible = "regulator-fixed";
+                        reg = <0>;
+                        regulator-name = "USB VBUS";
+                        regulator-min-microvolt = <5000000>;
+                        regulator-max-microvolt = <5000000>;
+                        enable-active-high;
+                        regulator-always-on;
+                        regulator-boot-on;
+                        gpio = <&gpio0 10 GPIO_ACTIVE_HIGH>;
+                };
+       };
+};
+
+&mdio {
+        status = "okay";
+
+        ethphy0: ethernet-phy@8 {
+                reg = <8>;
+        };
+};
+
+&eth0 {
+        status = "okay";
+        ethernet0-port@0 {
+                phy-handle = <&ethphy0>;
+        };
+};
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