Partially revert "drm/i915: s/mdelay/msleep/" in ilk rps code
authorDaniel Vetter <daniel.vetter@ffwll.ch>
Mon, 20 Jul 2015 08:58:21 +0000 (10:58 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Mon, 20 Jul 2015 08:59:38 +0000 (10:59 +0200)
This reverts commit 6adfb1ef106bfe4b5ecb8bd75c4d037741d28a48.

Ironlake RPS code runs under an irqsave spinlock and hence sleeping
isn't allowed. Not a this long delay while blocking irqs isn't great
at all, but fixing the locking scheme is a lot more involved.

So just revert for now.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reported-by: kernel test robot <ying.huang@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
drivers/gpu/drm/i915/intel_pm.c

index 0d3e01434860faf9904814369e1e881a230f90f6..a1d92b7f3e356ecfa75126b70814a014cb66cb00 100644 (file)
@@ -4266,7 +4266,7 @@ static void ironlake_enable_drps(struct drm_device *dev)
 
        if (wait_for_atomic((I915_READ(MEMSWCTL) & MEMCTL_CMD_STS) == 0, 10))
                DRM_ERROR("stuck trying to change perf mode\n");
-       msleep(1);
+       mdelay(1);
 
        ironlake_set_drps(dev, fstart);
 
@@ -4297,10 +4297,10 @@ static void ironlake_disable_drps(struct drm_device *dev)
 
        /* Go back to the starting frequency */
        ironlake_set_drps(dev, dev_priv->ips.fstart);
-       msleep(1);
+       mdelay(1);
        rgvswctl |= MEMCTL_CMD_STS;
        I915_WRITE(MEMSWCTL, rgvswctl);
-       msleep(1);
+       mdelay(1);
 
        spin_unlock_irq(&mchdev_lock);
 }