Documentation: dt: net: fix spelling mistakes
authorEric Engestrom <eric@engestrom.ch>
Mon, 25 Apr 2016 00:24:15 +0000 (01:24 +0100)
committerRob Herring <robh@kernel.org>
Mon, 25 Apr 2016 13:41:19 +0000 (08:41 -0500)
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Signed-off-by: Rob Herring <robh@kernel.org>
Documentation/devicetree/bindings/net/hisilicon-hns-nic.txt
Documentation/devicetree/bindings/net/stmmac.txt
Documentation/devicetree/bindings/net/ti,dp83867.txt

index e6a9d1c30878f89ff948d5fcd8cbe308e53327df..e911a635ce6e48c7db7f0f09457ca6e90e63b80d 100644 (file)
@@ -8,7 +8,7 @@ Required properties:
   specifies a reference to the associating hardware driver node.
   see Documentation/devicetree/bindings/net/hisilicon-hns-dsaf.txt
 - port-id: is the index of port provided by DSAF (the accelerator). DSAF can
-  connect to 8 PHYs. Port 0 to 1 are both used for adminstration purpose. They
+  connect to 8 PHYs. Port 0 to 1 are both used for administration purpose. They
   are called debug ports.
 
   The remaining 6 PHYs are taken according to the mode of DSAF.
index 6605d19601c2a6bcce217ef02a60f5afb42e0d55..9651dfdced44059abafccb5c1cc781dd13d78632 100644 (file)
@@ -51,8 +51,8 @@ Optional properties:
                           AXI register inside the DMA module:
        - snps,lpi_en: enable Low Power Interface
        - snps,xit_frm: unlock on WoL
-       - snps,wr_osr_lmt: max write oustanding req. limit
-       - snps,rd_osr_lmt: max read oustanding req. limit
+       - snps,wr_osr_lmt: max write outstanding req. limit
+       - snps,rd_osr_lmt: max read outstanding req. limit
        - snps,kbbe: do not cross 1KiB boundary.
        - snps,axi_all: align address
        - snps,blen: this is a vector of supported burst length.
index 58d935b58598102f4fab0b132ca0fbfadf544fab..5d21141a68b547104d5f152da0214dc847f4a3e9 100644 (file)
@@ -2,7 +2,7 @@
 
 Required properties:
        - reg - The ID number for the phy, usually a small integer
-       - ti,rx-internal-delay - RGMII Recieve Clock Delay - see dt-bindings/net/ti-dp83867.h
+       - ti,rx-internal-delay - RGMII Receive Clock Delay - see dt-bindings/net/ti-dp83867.h
                for applicable values
        - ti,tx-internal-delay - RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h
                for applicable values