ARM: S5PV310: Add DMC registers and map_desc
authorSunyoung Kang <sy0816.kang@samsung.com>
Tue, 21 Dec 2010 22:21:17 +0000 (07:21 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Thu, 23 Dec 2010 05:53:39 +0000 (14:53 +0900)
This patch adds DMC io mapping for access it and adds registers.
This is used in checking DRAM memory type.

Signed-off-by: Sunyoung Kang <sy0816.kang@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
arch/arm/mach-s5pv310/cpu.c
arch/arm/mach-s5pv310/include/mach/map.h
arch/arm/mach-s5pv310/include/mach/regs-mem.h [new file with mode: 0644]

index 82ce4aa6d61a5c07f004f26cc08e11d80f583b0d..283dd75effe7b0a149c019e2514039590e0fc8ec 100644 (file)
@@ -72,6 +72,11 @@ static struct map_desc s5pv310_iodesc[] __initdata = {
                .pfn            = __phys_to_pfn(S5PV310_PA_GPIO3),
                .length         = SZ_256,
                .type           = MT_DEVICE,
+       }, {
+               .virtual        = (unsigned long)S5P_VA_DMC0,
+               .pfn            = __phys_to_pfn(S5PV310_PA_DMC0),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE,
        }, {
                .virtual        = (unsigned long)S3C_VA_UART,
                .pfn            = __phys_to_pfn(S3C_PA_UART),
index 7acf4e77e92e442436542ed6b9e4682875f63e7c..37294f13ca0caf1c49a3be43e76b4873fbfe4e11 100644 (file)
@@ -44,6 +44,8 @@
 #define S5PV310_PA_WATCHDOG            (0x10060000)
 #define S5PV310_PA_RTC                 (0x10070000)
 
+#define S5PV310_PA_DMC0                        (0x10400000)
+
 #define S5PV310_PA_COMBINER            (0x10448000)
 
 #define S5PV310_PA_COREPERI            (0x10500000)
diff --git a/arch/arm/mach-s5pv310/include/mach/regs-mem.h b/arch/arm/mach-s5pv310/include/mach/regs-mem.h
new file mode 100644 (file)
index 0000000..8342271
--- /dev/null
@@ -0,0 +1,23 @@
+/* linux/arch/arm/mach-s5pv310/include/mach/regs-mem.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *             http://www.samsung.com
+ *
+ * S5PV310 - SROMC and DMC register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_REGS_MEM_H
+#define __ASM_ARCH_REGS_MEM_H __FILE__
+
+#include <mach/map.h>
+
+#define S5P_DMC0_MEMCON_OFFSET         0x04
+
+#define S5P_DMC0_MEMTYPE_SHIFT         8
+#define S5P_DMC0_MEMTYPE_MASK          0xF
+
+#endif /* __ASM_ARCH_REGS_MEM_H */