PCI: Disable cardbus bridge MEM1 prefetchable bit
authorYinghai Lu <yinghai@kernel.org>
Fri, 10 Feb 2012 23:33:46 +0000 (15:33 -0800)
committerJesse Barnes <jbarnes@virtuousgeek.org>
Thu, 23 Feb 2012 19:59:45 +0000 (11:59 -0800)
Some BIOSes enable prefetch on both MEM0 and MEM1.  But the cardbus code
assumes MEM1 is non-pref...

Discussion could be found at:
https://lkml.org/lkml/2012/1/12/1
https://bugzilla.kernel.org/show_bug.cgi?id=41622#c23

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Tested-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
drivers/pci/setup-bus.c

index 090217afb4e1708f734b036db5f86d8cf5c05a4a..d5897c32f6697ea343f7c0ff45d4d5c30cfeb5e1 100644 (file)
@@ -914,6 +914,14 @@ static void pci_bus_size_cardbus(struct pci_bus *bus,
        if (realloc_head)
                add_to_list(realloc_head, bridge, b_res+1, pci_cardbus_io_size, 0 /* dont care */);
 
+       /* MEM1 must not be pref mmio */
+       pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
+       if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM1) {
+               ctrl &= ~PCI_CB_BRIDGE_CTL_PREFETCH_MEM1;
+               pci_write_config_word(bridge, PCI_CB_BRIDGE_CONTROL, ctrl);
+               pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
+       }
+
        /*
         * Check whether prefetchable memory is supported
         * by this bridge.