sh_pfc_config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos);
dev_dbg(pfc->dev, "write_reg addr = %lx, value = 0x%x, field = %ld, "
- "r_width = %ld, f_width = %ld\n",
+ "r_width = %u, f_width = %u\n",
crp->reg, value, field, crp->reg_width, crp->field_width);
mask = ~(mask << pos);
};
struct pinmux_cfg_reg {
- unsigned long reg, reg_width, field_width;
+ unsigned long reg;
+ u8 reg_width, field_width;
const u16 *enum_ids;
- const unsigned long *var_field_width;
+ const u8 *var_field_width;
};
#define PINMUX_CFG_REG(name, r, r_width, f_width) \
#define PINMUX_CFG_REG_VAR(name, r, r_width, var_fw0, var_fwn...) \
.reg = r, .reg_width = r_width, \
- .var_field_width = (const unsigned long [r_width]) \
+ .var_field_width = (const u8 [r_width]) \
{ var_fw0, var_fwn, 0 }, \
.enum_ids = (const u16 [])
struct pinmux_data_reg {
- unsigned long reg, reg_width;
+ unsigned long reg;
+ u8 reg_width;
const u16 *enum_ids;
};