drm/i915/bdw: Add Broadwell support for debugfs rps freq info

Add Broadwell support to i915_frequency_info
and extend i915_max|min_freq_get|set to (gen >= 6).

v2: generalized support for i915_max|min_freq_get|set (Daniel).

Signed-off-by: Tom O'Rourke <Tom.O'Rourke@intel.com>
Reviewed-by: Jeff McGee <jeff.mcgee@intel.com>
[danvet: Fix checkpatch fail.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 252c4bcd734828c601ed45fd701df99d6023bf25..7b832979e8d99752d7992f07f90e223223e2b94a 100644 (file)
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1027,7 +1027,8 @@ static int i915_frequency_info(struct seq_file *m, void *unused)
                           MEMSTAT_VID_SHIFT);
                seq_printf(m, "Current P-state: %d\n",
                           (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
-       } else if ((IS_GEN6(dev) || IS_GEN7(dev)) && !IS_VALLEYVIEW(dev)) {
+       } else if (IS_GEN6(dev) || (IS_GEN7(dev) && !IS_VALLEYVIEW(dev)) ||
+                  IS_BROADWELL(dev)) {
                u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
                u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS);
                u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
@@ -1046,7 +1047,7 @@ static int i915_frequency_info(struct seq_file *m, void *unused)
 
                reqf = I915_READ(GEN6_RPNSWREQ);
                reqf &= ~GEN6_TURBO_DISABLE;
-               if (IS_HASWELL(dev))
+               if (IS_HASWELL(dev) || IS_BROADWELL(dev))
                        reqf >>= 24;
                else
                        reqf >>= 25;
@@ -1063,7 +1064,7 @@ static int i915_frequency_info(struct seq_file *m, void *unused)
                rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI);
                rpcurdown = I915_READ(GEN6_RP_CUR_DOWN);
                rpprevdown = I915_READ(GEN6_RP_PREV_DOWN);
-               if (IS_HASWELL(dev))
+               if (IS_HASWELL(dev) || IS_BROADWELL(dev))
                        cagf = (rpstat & HSW_CAGF_MASK) >> HSW_CAGF_SHIFT;
                else
                        cagf = (rpstat & GEN6_CAGF_MASK) >> GEN6_CAGF_SHIFT;
@@ -3505,7 +3506,7 @@ i915_max_freq_get(void *data, u64 *val)
        struct drm_i915_private *dev_priv = dev->dev_private;
        int ret;
 
-       if (!(IS_GEN6(dev) || IS_GEN7(dev)))
+       if (INTEL_INFO(dev)->gen < 6)
                return -ENODEV;
 
        flush_delayed_work(&dev_priv->rps.delayed_resume_work);
@@ -3531,7 +3532,7 @@ i915_max_freq_set(void *data, u64 val)
        u32 rp_state_cap, hw_max, hw_min;
        int ret;
 
-       if (!(IS_GEN6(dev) || IS_GEN7(dev)))
+       if (INTEL_INFO(dev)->gen < 6)
                return -ENODEV;
 
        flush_delayed_work(&dev_priv->rps.delayed_resume_work);
@@ -3586,7 +3587,7 @@ i915_min_freq_get(void *data, u64 *val)
        struct drm_i915_private *dev_priv = dev->dev_private;
        int ret;
 
-       if (!(IS_GEN6(dev) || IS_GEN7(dev)))
+       if (INTEL_INFO(dev)->gen < 6)
                return -ENODEV;
 
        flush_delayed_work(&dev_priv->rps.delayed_resume_work);
@@ -3612,7 +3613,7 @@ i915_min_freq_set(void *data, u64 val)
        u32 rp_state_cap, hw_max, hw_min;
        int ret;
 
-       if (!(IS_GEN6(dev) || IS_GEN7(dev)))
+       if (INTEL_INFO(dev)->gen < 6)
                return -ENODEV;
 
        flush_delayed_work(&dev_priv->rps.delayed_resume_work);