drm/amd/powerplay: avoid out of bounds access on array ps.

check array index first and then visit the array.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index 13f2b705ea49811269ec409d476f4835c1efaa03..08cd0bd3ebe5b1e34b14940a4cff4805027518e1 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -2984,19 +2984,19 @@ static int smu7_get_pp_table_entry_callback_func_v0(struct pp_hwmgr *hwmgr,
        if (!(data->mc_micro_code_feature & DISABLE_MC_LOADMICROCODE) && memory_clock > data->highest_mclk)
                data->highest_mclk = memory_clock;
 
-       performance_level = &(ps->performance_levels
-                       [ps->performance_level_count++]);
-
        PP_ASSERT_WITH_CODE(
                        (ps->performance_level_count < smum_get_mac_definition(hwmgr->smumgr, SMU_MAX_LEVELS_GRAPHICS)),
                        "Performance levels exceeds SMC limit!",
                        return -EINVAL);
 
        PP_ASSERT_WITH_CODE(
-                       (ps->performance_level_count <=
+                       (ps->performance_level_count <
                                        hwmgr->platform_descriptor.hardwareActivityPerformanceLevels),
-                       "Performance levels exceeds Driver limit!",
-                       return -EINVAL);
+                       "Performance levels exceeds Driver limit, Skip!",
+                       return 0);
+
+       performance_level = &(ps->performance_levels
+                       [ps->performance_level_count++]);
 
        /* Performance levels are arranged from low to high. */
        performance_level->memory_clock = memory_clock;