ARM: 6184/2: ux500: use neutral PRCMU base
authorLinus Walleij <linus.walleij@stericsson.com>
Wed, 23 Jun 2010 06:59:48 +0000 (07:59 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Fri, 9 Jul 2010 13:46:47 +0000 (14:46 +0100)
The MTU wallclock timing fix-up patch was hardwired to the DB8500
causing a regression. This makes it work on the DB5500 as well.

Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mach-ux500/clock.c
arch/arm/mach-ux500/cpu-db5500.c

index fe84b9021c7adee213fdb94c7639c7f77e2dfaa5..0a1318fc8e2bd6c29774bcf1ab8cc48f6a5cfa0c 100644 (file)
@@ -131,7 +131,7 @@ EXPORT_SYMBOL(clk_disable);
  */
 static unsigned long clk_mtu_get_rate(struct clk *clk)
 {
-       void __iomem *addr = __io_address(U8500_PRCMU_BASE)
+       void __iomem *addr = __io_address(UX500_PRCMU_BASE)
                + PRCM_TCR;
        u32 tcr = readl(addr);
        int mtu = (int) clk->data;
index 6a3ac4539f164e23f7109896e8bab431ff9392bf..e9278f6d67aa7529f2408fd15fd5eab1bfecdb20 100644 (file)
@@ -21,6 +21,7 @@ static struct map_desc u5500_io_desc[] __initdata = {
        __IO_DEV_DESC(U5500_GPIO2_BASE, SZ_4K),
        __IO_DEV_DESC(U5500_GPIO3_BASE, SZ_4K),
        __IO_DEV_DESC(U5500_GPIO4_BASE, SZ_4K),
+       __IO_DEV_DESC(U5500_PRCMU_BASE, SZ_4K),
 };
 
 static struct platform_device *u5500_platform_devs[] __initdata = {