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drm/i915: Add comments about fixed pipe->transcoder/PLL mapping
author
Imre Deak
<imre.deak@intel.com>
Thu, 12 May 2016 13:18:50 +0000
(16:18 +0300)
committer
Imre Deak
<imre.deak@intel.com>
Fri, 13 May 2016 12:17:58 +0000
(15:17 +0300)
Code checkers may complain about the explicit casts between different
enum types, so add comments for known-valid cases to help future
triaging of such complaints.
v2:
- Make the comments more logical (Ville).
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link:
http://patchwork.freedesktop.org/patch/msgid/1463059132-1720-3-git-send-email-imre.deak@intel.com
drivers/gpu/drm/i915/intel_display.c
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diff --git
a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index bdccf5038b6236694eba72f7b16325d53c00610d..51d0070696094af475b7c0b85bad6aa78c2a08de 100644
(file)
--- a/
drivers/gpu/drm/i915/intel_display.c
+++ b/
drivers/gpu/drm/i915/intel_display.c
@@
-9290,6
+9290,10
@@
static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
ironlake_get_fdi_m_n_config(crtc, pipe_config);
if (HAS_PCH_IBX(dev_priv)) {
+ /*
+ * The pipe->pch transcoder and pch transcoder->pll
+ * mapping is fixed.
+ */
pll_id = (enum intel_dpll_id) crtc->pipe;
} else {
tmp = I915_READ(PCH_DPLL_SEL);
@@
-9840,6
+9844,10
@@
static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
enum intel_display_power_domain power_domain;
u32 tmp;
+ /*
+ * The pipe->transcoder mapping is fixed with the exception of the eDP
+ * transcoder handled below.
+ */
pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
/*