#include "clock.h"
#include "clock2xxx.h"
#include "opp2xxx.h"
-#include "cm2xxx_3xxx.h"
+#include "cm2xxx.h"
#include "cm-regbits-24xx.h"
#include "sdrc.h"
#include "clock.h"
#include "clock2xxx.h"
#include "opp2xxx.h"
-#include "cm2xxx_3xxx.h"
+#include "cm2xxx.h"
#include "cm-regbits-24xx.h"
#include "sdrc.h"
/*
* OMAP2+ Clock Management prototypes
*
- * Copyright (C) 2007-2009 Texas Instruments, Inc.
+ * Copyright (C) 2007-2009, 2012 Texas Instruments, Inc.
* Copyright (C) 2007-2009 Nokia Corporation
*
* Written by Paul Walmsley
*/
#define MAX_MODULE_READY_TIME 2000
+# ifndef __ASSEMBLER__
+extern void __iomem *cm_base;
+extern void __iomem *cm2_base;
+extern void omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2);
+# endif
+
/*
* MAX_MODULE_DISABLE_TIME: max duration in microseconds to wait for
* the PRCM to request that a module enter the inactive state in the
#ifndef __ARCH_ASM_MACH_OMAP2_CM2XXX_3XXX_H
#define __ARCH_ASM_MACH_OMAP2_CM2XXX_3XXX_H
-#include "prcm-common.h"
+#include "cm.h"
/*
* Module specific CM register offsets from CM_BASE + domain offset
* OMAP2+ common Clock Management (CM) IP block functions
*
* Copyright (C) 2012 Texas Instruments, Inc.
- * Paul Walmsley <paul@pwsan.com>
+ * Paul Walmsley
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
#include "cm2xxx.h"
#include "cm3xxx.h"
#include "cm44xx.h"
+#include "common.h"
/*
* cm_ll_data: function pointers to SoC-specific implementations of
static struct cm_ll_data null_cm_ll_data;
static struct cm_ll_data *cm_ll_data = &null_cm_ll_data;
+/* cm_base: base virtual address of the CM IP block */
+void __iomem *cm_base;
+
+/* cm2_base: base virtual address of the CM2 IP block (OMAP44xx only) */
+void __iomem *cm2_base;
+
+/**
+ * omap2_set_globals_cm - set the CM/CM2 base addresses (for early use)
+ * @cm: CM base virtual address
+ * @cm2: CM2 base virtual address (if present on the booted SoC)
+ *
+ * XXX Will be replaced when the PRM/CM drivers are completed.
+ */
+void __init omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2)
+{
+ cm_base = cm;
+ cm2_base = cm2;
+}
+
/**
* cm_split_idlest_reg - split CM_IDLEST reg addr into its components
* @idlest_reg: CM_IDLEST* virtual address
extern u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx,
u32 mask);
+extern void omap_cm_base_init(void);
+
#endif
#include "serial.h"
#include "cm2xxx.h"
#include "cm3xxx.h"
-
+#include "prm.h"
+#include "cm.h"
+#include "prcm_mpu44xx.h"
+#include "prminst44xx.h"
+#include "cminst44xx.h"
/*
* The machine specific code may provide the extra mapping besides the
* default mapping provided here.
OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE));
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE),
NULL);
- omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE),
- OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE),
- NULL, NULL);
+ omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE));
+ omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE), NULL);
omap2xxx_check_revision();
omap2xxx_cm_init();
omap_common_init_early();
OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE));
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
NULL);
- omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE),
- OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE),
- NULL, NULL);
+ omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE));
+ omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE), NULL);
omap2xxx_check_revision();
omap2xxx_cm_init();
omap_common_init_early();
OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE));
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
NULL);
- omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE),
- OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE),
- NULL, NULL);
+ omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE));
+ omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), NULL);
omap3xxx_check_revision();
omap3xxx_check_features();
omap3xxx_cm_init();
OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
NULL);
- omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE),
- OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE),
- NULL, NULL);
+ omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE));
+ omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL);
omap3xxx_check_revision();
ti81xx_check_features();
omap_common_init_early();
AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE));
omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
NULL);
- omap2_set_globals_prcm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE),
- AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE),
- NULL, NULL);
+ omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE));
+ omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL);
omap3xxx_check_revision();
ti81xx_check_features();
omap_common_init_early();
OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE));
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE));
- omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE),
- OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
- OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE),
- OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
+ omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE));
+ omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
+ OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE));
+ omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
+ omap_prm_base_init();
+ omap_cm_base_init();
omap4xxx_check_revision();
omap4xxx_check_features();
omap_common_init_early();
OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE));
- omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE),
- OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE),
- OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE),
- OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
+ omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE));
+ omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE),
+ OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE));
+ omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
+ omap_prm_base_init();
+ omap_cm_base_init();
omap5xxx_check_revision();
omap_common_init_early();
}
* FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle.
* Sidetone needs non-gated ICLK and sidetone autoidle is broken.
*/
-#include "cm2xxx_3xxx.h"
+#include "cm3xxx.h"
#include "cm-regbits-34xx.h"
static int omap3_enable_st_clock(unsigned int id, bool enable)
#include "mmc.h"
#include "hsmmc.h"
#include "prminst44xx.h"
+#include "prcm_mpu44xx.h"
#include "omap4-sar-layout.h"
#include "omap-secure.h"
#define MAX_IOPAD_LATCH_TIME 100
# ifndef __ASSEMBLER__
-extern void __iomem *prm_base;
-extern void __iomem *cm_base;
-extern void __iomem *cm2_base;
-extern void __iomem *prcm_mpu_base;
-
-#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
-extern void omap_prm_base_init(void);
-extern void omap_cm_base_init(void);
-#else
-static inline void omap_prm_base_init(void)
-{
-}
-static inline void omap_cm_base_init(void)
-{
-}
-#endif
/**
* struct omap_prcm_irq - describes a PRCM interrupt bit
#include "prm-regbits-44xx.h"
#include "control.h"
-void __iomem *prm_base;
-void __iomem *cm_base;
-void __iomem *cm2_base;
-void __iomem *prcm_mpu_base;
-
-
-void __init omap2_set_globals_prcm(void __iomem *prm, void __iomem *cm,
- void __iomem *cm2, void __iomem *prcm_mpu)
-{
- prm_base = prm;
- cm_base = cm;
- cm2_base = cm2;
- prcm_mpu_base = prcm_mpu;
-
- if (cpu_is_omap44xx() || soc_is_omap54xx()) {
- omap_prm_base_init();
- omap_cm_base_init();
- }
-}
/*
* Stubbed functions so that common files continue to build when
#include "prcm_mpu44xx.h"
#include "cm-regbits-44xx.h"
+/*
+ * prcm_mpu_base: the virtual address of the start of the PRCM_MPU IP
+ * block registers
+ */
+void __iomem *prcm_mpu_base;
+
/* PRCM_MPU low-level functions */
u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 reg)
return v;
}
+
+/**
+ * omap2_set_globals_prcm_mpu - set the MPU PRCM base address (for early use)
+ * @prcm_mpu: PRCM_MPU base virtual address
+ *
+ * XXX Will be replaced when the PRM/CM drivers are completed.
+ */
+void __init omap2_set_globals_prcm_mpu(void __iomem *prcm_mpu)
+{
+ prcm_mpu_base = prcm_mpu;
+}
/*
* OMAP44xx PRCM MPU instance offset macros
*
- * Copyright (C) 2010 Texas Instruments, Inc.
+ * Copyright (C) 2010, 2012 Texas Instruments, Inc.
* Copyright (C) 2010 Nokia Corporation
*
* Paul Walmsley (paul@pwsan.com)
#ifndef __ARCH_ARM_MACH_OMAP2_PRCM_MPU44XX_H
#define __ARCH_ARM_MACH_OMAP2_PRCM_MPU44XX_H
+#include "common.h"
+
+# ifndef __ASSEMBLER__
+extern void __iomem *prcm_mpu_base;
+# endif
+
#define OMAP4430_PRCM_MPU_BASE 0x48243000
#define OMAP44XX_PRCM_MPU_REGADDR(inst, reg) \
extern void omap4_prcm_mpu_write_inst_reg(u32 val, s16 inst, u16 idx);
extern u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst,
s16 idx);
+extern void __init omap2_set_globals_prcm_mpu(void __iomem *prcm_mpu);
# endif
#endif
/*
* OMAP2/3/4 Power/Reset Management (PRM) bitfield definitions
*
- * Copyright (C) 2007-2009 Texas Instruments, Inc.
+ * Copyright (C) 2007-2009, 2012 Texas Instruments, Inc.
* Copyright (C) 2010 Nokia Corporation
*
* Paul Walmsley
#include "prcm-common.h"
+# ifndef __ASSEMBLER__
+extern void __iomem *prm_base;
+extern void omap2_set_globals_prm(void __iomem *prm);
+# endif
+
/*
* 24XX: PM_PWSTST_CORE, PM_PWSTST_GFX, PM_PWSTST_MPU, PM_PWSTST_DSP
*
#include "prm2xxx.h"
#include "prm3xxx.h"
#include "prm44xx.h"
+#include "common.h"
/*
* OMAP_PRCM_MAX_NR_PENDING_REG: maximum number of PRM_IRQ*_MPU regs
*/
static struct omap_prcm_irq_setup *prcm_irq_setup;
+/* prm_base: base virtual address of the PRM IP block */
+void __iomem *prm_base;
+
/*
* prm_ll_data: function pointers to SoC-specific implementations of
* common PRM functions
return -ENOMEM;
}
+/**
+ * omap2_set_globals_prm - set the PRM base address (for early use)
+ * @prm: PRM base virtual address
+ *
+ * XXX Will be replaced when the PRM/CM drivers are completed.
+ */
+void __init omap2_set_globals_prm(void __iomem *prm)
+{
+ prm_base = prm;
+}
+
/**
* prm_read_reset_sources - return the sources of the SoC's last reset
*
extern int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst,
u16 rstctrl_offs);
+extern void omap_prm_base_init(void);
+
#endif
#ifndef __ASM_ARM_ARCH_OMAP_PRCM_H
#define __ASM_ARM_ARCH_OMAP_PRCM_H
-#include <linux/kernel.h>
-#include <linux/io.h>
-
-void __init omap2_set_globals_prcm(void __iomem *prm, void __iomem *cm,
- void __iomem *cm2, void __iomem *prcm_mpu);
+/* XXX To be removed */
#endif