Add a CPU feature for the LSE atomic instructions, so that they can be
patched in at runtime when we detect that they are supported.
Reviewed-by: Steve Capper <steve.capper@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
#define ARM64_WORKAROUND_845719 2
#define ARM64_HAS_SYSREG_GIC_CPUIF 3
#define ARM64_HAS_PAN 4
+#define ARM64_CPU_FEAT_LSE_ATOMICS 5
-#define ARM64_NCAPS 5
+#define ARM64_NCAPS 6
#ifndef __ASSEMBLY__
default:
case 2:
elf_hwcap |= HWCAP_ATOMICS;
+ cpus_set_cap(ARM64_CPU_FEAT_LSE_ATOMICS);
case 1:
/* RESERVED */
case 0: