ARM: imx: enable cpufreq for imx6q
authorShawn Guo <shawn.guo@linaro.org>
Thu, 19 Jul 2012 15:16:30 +0000 (23:16 +0800)
committerShawn Guo <shawn.guo@linaro.org>
Fri, 16 Nov 2012 06:18:53 +0000 (14:18 +0800)
It enables cpufreq support for imx6q with generic cpufreq-cpu0 driver.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
arch/arm/boot/dts/imx6q.dtsi
arch/arm/mach-imx/Kconfig
arch/arm/mach-imx/clk-imx6q.c

index 255f56b124e6b2ac685f175d95192f62239d2afc..1565aea59ebb93125458385f575d0e4508d931ce 100644 (file)
                        compatible = "arm,cortex-a9";
                        reg = <0>;
                        next-level-cache = <&L2>;
+                       operating-points = <
+                               /* kHz    uV */
+                               792000  1100000
+                               396000  950000
+                               198000  850000
+                       >;
+                       clock-latency = <61036>; /* two CLK32 periods */
+                       cpu0-supply = <&reg_cpu>;
                };
 
                cpu@1 {
                                        anatop-max-voltage = <2750000>;
                                };
 
-                               regulator-vddcore@140 {
+                               reg_cpu: regulator-vddcore@140 {
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "cpu";
                                        regulator-min-microvolt = <725000>;
index f1bf610e29005c4ca6c87b038bb59ad061446de8..01bf72c56c01a9451d163c7b65d38e0584a00696 100644 (file)
@@ -829,6 +829,8 @@ config      SOC_IMX53
 
 config SOC_IMX6Q
        bool "i.MX6 Quad support"
+       select ARCH_HAS_CPUFREQ
+       select ARCH_HAS_OPP
        select ARM_CPU_SUSPEND if PM
        select ARM_GIC
        select COMMON_CLK
@@ -841,6 +843,7 @@ config SOC_IMX6Q
        select MFD_SYSCON
        select PINCTRL
        select PINCTRL_IMX6Q
+       select PM_OPP if PM
 
        help
          This enables support for Freescale i.MX6 Quad processor.
index e5a82bb95b526b7225bdd000c0d5665f6e3949c5..5f9f5919dd748497d9ad1fc25178350216f8fbbc 100644 (file)
@@ -406,6 +406,7 @@ int __init mx6q_clocks_init(void)
        clk_register_clkdev(clk[cko1_sel], "cko1_sel", NULL);
        clk_register_clkdev(clk[ahb], "ahb", NULL);
        clk_register_clkdev(clk[cko1], "cko1", NULL);
+       clk_register_clkdev(clk[arm], NULL, "cpu0");
 
        /*
         * The gpmi needs 100MHz frequency in the EDO/Sync mode,