ARM: STi: DT: STiH407: Fix retime pin mask for PIO5 and PIO35

This will avoid programming the retime registers when not implemented

- PIO5  : no retime registers assigned to pins 6 and 7
- PIO35 : pin 7 is reserved so no retime register assigned to it

Signed-off-by: Karim BEN BELGACEM <karim.ben-belgacem@st.com>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>

diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi
index 402844cb31524d2f9e75f06b901e7dc9c2496897..0a754f2752121eddc1c5c6540d43bb83cb1585f2 100644 (file)
--- a/arch/arm/boot/dts/stih407-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi
@@ -104,6 +104,7 @@
                                #interrupt-cells = <2>;
                                reg = <0x5000 0x100>;
                                st,bank-name = "PIO5";
+                               st,retime-pin-mask = <0x3f>;
                        };
 
                        rc {
@@ -519,6 +520,7 @@
                                #interrupt-cells = <2>;
                                reg = <0x5000 0x100>;
                                st,bank-name = "PIO35";
+                               st,retime-pin-mask = <0x7f>;
                        };
 
                        i2c4 {