void s3c2410_restart(char mode, const char *cmd);
void s3c244x_restart(char mode, const char *cmd);
+extern struct syscore_ops s3c24xx_irq_syscore_ops;
+
#endif /* __ARCH_ARM_MACH_S3C24XX_COMMON_H */
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
+#include <linux/syscore_ops.h>
#include <plat/cpu.h>
#include <plat/pm.h>
static unsigned long save_eintflt[4];
static unsigned long save_eintmask;
-int s3c24xx_irq_suspend(void)
+static int s3c24xx_irq_suspend(void)
{
unsigned int i;
return 0;
}
-void s3c24xx_irq_resume(void)
+static void s3c24xx_irq_resume(void)
{
unsigned int i;
s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save));
__raw_writel(save_eintmask, S3C24XX_EINTMASK);
}
+
+struct syscore_ops s3c24xx_irq_syscore_ops = {
+ .suspend = s3c24xx_irq_suspend,
+ .resume = s3c24xx_irq_resume,
+};
#include <plat/gpio-cfg.h>
#include <plat/gpio-cfg-helpers.h>
+#include "common.h"
+
/* Initial IO mappings */
static struct map_desc s3c2410_iodesc[] __initdata = {
#ifdef CONFIG_PM
register_syscore_ops(&s3c2410_pm_syscore_ops);
-#endif
register_syscore_ops(&s3c24xx_irq_syscore_ops);
+#endif
return device_register(&s3c2410_dev);
}
#include <plat/regs-spi.h>
#include <plat/s3c2412.h>
+#include "common.h"
#include "regs-dsc.h"
#define S3C2412_SWRST (S3C24XX_VA_CLKPWR + 0x30)
#ifdef CONFIG_PM
register_syscore_ops(&s3c2412_pm_syscore_ops);
-#endif
register_syscore_ops(&s3c24xx_irq_syscore_ops);
+#endif
return device_register(&s3c2412_dev);
}
#include <plat/rtc-core.h>
#include <plat/spi-core.h>
+#include "common.h"
+
static struct map_desc s3c2416_iodesc[] __initdata = {
IODESC_ENT(WATCHDOG),
IODESC_ENT(CLKPWR),
#ifdef CONFIG_PM
register_syscore_ops(&s3c2416_pm_syscore_ops);
-#endif
register_syscore_ops(&s3c24xx_irq_syscore_ops);
register_syscore_ops(&s3c2416_irq_syscore_ops);
+#endif
return device_register(&s3c2416_dev);
}
#include <plat/gpio-cfg.h>
#include <plat/gpio-cfg-helpers.h>
+#include "common.h"
+
static struct device s3c2440_dev = {
.bus = &s3c2440_subsys,
};
#ifdef CONFIG_PM
register_syscore_ops(&s3c2410_pm_syscore_ops);
+ register_syscore_ops(&s3c24xx_irq_syscore_ops);
#endif
register_syscore_ops(&s3c244x_pm_syscore_ops);
- register_syscore_ops(&s3c24xx_irq_syscore_ops);
/* register our system device for everything else */
#include <plat/gpio-cfg.h>
#include <plat/gpio-cfg-helpers.h>
+#include "common.h"
+
/* S3C2442 extended clock support */
static unsigned long s3c2442_camif_upll_round(struct clk *clk,
#ifdef CONFIG_PM
register_syscore_ops(&s3c2410_pm_syscore_ops);
+ register_syscore_ops(&s3c24xx_irq_syscore_ops);
#endif
register_syscore_ops(&s3c244x_pm_syscore_ops);
- register_syscore_ops(&s3c24xx_irq_syscore_ops);
return device_register(&s3c2442_dev);
}
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/device.h>
-#include <linux/syscore_ops.h>
#include <linux/irqdomain.h>
#include <asm/mach/irq.h>
s3c24xx_init_intc(NULL, &init_subint[0], main_intc, 0x4a000018);
s3c24xx_init_intc(NULL, &init_eint[0], main_intc, 0x560000a4);
}
-
-struct syscore_ops s3c24xx_irq_syscore_ops = {
- .suspend = s3c24xx_irq_suspend,
- .resume = s3c24xx_irq_resume,
-};
#ifdef CONFIG_PM
extern int s3c_irq_wake(struct irq_data *data, unsigned int state);
extern int s3c_irqext_wake(struct irq_data *data, unsigned int state);
-extern int s3c24xx_irq_suspend(void);
-extern void s3c24xx_irq_resume(void);
#else
#define s3c_irq_wake NULL
#define s3c_irqext_wake NULL
-#define s3c24xx_irq_suspend NULL
-#define s3c24xx_irq_resume NULL
#endif
-extern struct syscore_ops s3c24xx_irq_syscore_ops;
-
/* PM debug functions */
#ifdef CONFIG_SAMSUNG_PM_DEBUG