ARM: dts: meson8b: add the SCU device node

Amlogic's Meson8b SoC has a Snoop Control Unit (SCU), just like many
other Cortex-A5 SoCs. Add the corresponding devicetree node so it can be
used during SMP boot.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi
index 17a4c62555897493cc40380e272ca2653f176520..dfe83364eceb4ca254d5c056f9ee2a6842ac4467 100644 (file)
--- a/arch/arm/boot/dts/meson8.dtsi
+++ b/arch/arm/boot/dts/meson8.dtsi
@@ -110,6 +110,11 @@
                        no-map;
                };
        };
+
+       scu@c4300000 {
+               compatible = "arm,cortex-a9-scu";
+               reg = <0xc4300000 0x100>;
+       };
 }; /* end of / */
 
 &aobus {

diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi
index 521be5dfa8ef5bdd644616e7c48016dcd84df441..173b12a999e63cacdc3f81a8d1f5d0807a4956b3 100644 (file)
--- a/arch/arm/boot/dts/meson8b.dtsi
+++ b/arch/arm/boot/dts/meson8b.dtsi
@@ -82,6 +82,11 @@
                        reg = <0x203>;
                };
        };
+
+       scu@c4300000 {
+               compatible = "arm,cortex-a5-scu";
+               reg = <0xc4300000 0x100>;
+       };
 }; /* end of / */
 
 &aobus {