ARM: dts: add Exynos4 and Exynos5 clock controller nodes

Add clock controller nodes for EXYNOS4210, EXYNOS4x12, EXYNOS5250
and EXYNOS5440 SoCs.

Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 49a2786e00b9737042c5e96f6a3abf030d3f116f..65fa86d26fb629690a043ee969dc501875bac699 100644 (file)
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -69,6 +69,12 @@
                };
        };
 
+       clock: clock-controller@0x10030000 {
+               compatible = "samsung,exynos4210-clock";
+               reg = <0x10030000 0x20000>;
+               #clock-cells = <1>;
+       };
+
        pinctrl_0: pinctrl@11400000 {
                compatible = "samsung,exynos4210-pinctrl";
                reg = <0x11400000 0x1000>;

diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index 9a87806949093e717b1084e1704f14db33767e06..7496b8d633eaa060df987b525b4ed4eb4d12984a 100644 (file)
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -36,6 +36,12 @@
                             <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>;
        };
 
+       clock: clock-controller@0x10030000 {
+               compatible = "samsung,exynos4412-clock";
+               reg = <0x10030000 0x20000>;
+               #clock-cells = <1>;
+       };
+
        pinctrl_0: pinctrl@11400000 {
                compatible = "samsung,exynos4x12-pinctrl";
                reg = <0x11400000 0x1000>;

diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 4fe76bf299fbec55e4a743e60c530d43c83f39be..0fcabd711ec9ee6e5a6f086905e4abebb1cc864d 100644 (file)
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -56,6 +56,12 @@
                reg = <0x10044040 0x20>;
        };
 
+       clock: clock-controller@0x10010000 {
+               compatible = "samsung,exynos5250-clock";
+               reg = <0x10010000 0x30000>;
+               #clock-cells = <1>;
+       };
+
        gic:interrupt-controller@10481000 {
                compatible = "arm,cortex-a9-gic";
                #interrupt-cells = <3>;

diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index 5c5a69954d8bd2dea1327c6881af878ded9d47a9..f5834d062a1ad788620f6217ffa0aa91abdf59a1 100644 (file)
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -16,6 +16,12 @@
 
        interrupt-parent = <&gic>;
 
+       clock: clock-controller@0x160000 {
+               compatible = "samsung,exynos5440-clock";
+               reg = <0x160000 0x1000>;
+               #clock-cells = <1>;
+       };
+
        gic:interrupt-controller@2E0000 {
                compatible = "arm,cortex-a15-gic";
                #interrupt-cells = <3>;