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perf/x86/intel: Document all Haswell models
author
Andi Kleen
<ak@linux.intel.com>
Tue, 2 Sep 2014 18:44:12 +0000
(11:44 -0700)
committer
Ingo Molnar
<mingo@kernel.org>
Wed, 24 Sep 2014 12:48:16 +0000
(14:48 +0200)
Add names for each Haswell model as requested by Peter.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: eranian@google.com
Link:
http://lkml.kernel.org/r/1409683455-29168-2-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/kernel/cpu/perf_event_intel.c
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diff --git
a/arch/x86/kernel/cpu/perf_event_intel.c
b/arch/x86/kernel/cpu/perf_event_intel.c
index f962e2639e943c7919e97a586ee6a24c3db876dd..7c9f78ed421e382e304100ec7ef4b123187ee1dd 100644
(file)
--- a/
arch/x86/kernel/cpu/perf_event_intel.c
+++ b/
arch/x86/kernel/cpu/perf_event_intel.c
@@
-2540,10
+2540,10
@@
__init int intel_pmu_init(void)
break;
- case 60: /* 22nm Haswell */
- case 63:
- case 69:
- case 70:
+ case 60: /* 22nm Haswell
Core
*/
+ case 63:
/* 22nm Haswell Server */
+ case 69:
/* 22nm Haswell ULT */
+ case 70:
/* 22nm Haswell + GT3e (Intel Iris Pro graphics) */
x86_pmu.late_ack = true;
memcpy(hw_cache_event_ids, snb_hw_cache_event_ids, sizeof(hw_cache_event_ids));
memcpy(hw_cache_extra_regs, snb_hw_cache_extra_regs, sizeof(hw_cache_extra_regs));