cxgb4/cxgb4vf: read the correct bits of PL Who Am I register
authorHariprasad Shenai <hariprasad@chelsio.com>
Tue, 4 Aug 2015 09:06:19 +0000 (14:36 +0530)
committerDavid S. Miller <davem@davemloft.net>
Tue, 4 Aug 2015 08:24:35 +0000 (01:24 -0700)
Read the correct bits of PL Who Am I for the Source PF field which has
changed in T6

Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
drivers/net/ethernet/chelsio/cxgb4/t4_regs.h
drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c

index d582e175dfb61827be5304636df03f7859cd5dbb..27e87b6baa455cc41c85510ce6a54d23d3cae8e7 100644 (file)
@@ -4551,6 +4551,32 @@ static void free_some_resources(struct adapter *adapter)
                   NETIF_F_IPV6_CSUM | NETIF_F_HIGHDMA)
 #define SEGMENT_SIZE 128
 
+static int get_chip_type(struct pci_dev *pdev, u32 pl_rev)
+{
+       int ver, chip;
+       u16 device_id;
+
+       /* Retrieve adapter's device ID */
+       pci_read_config_word(pdev, PCI_DEVICE_ID, &device_id);
+       ver = device_id >> 12;
+       switch (ver) {
+       case CHELSIO_T4:
+               chip |= CHELSIO_CHIP_CODE(CHELSIO_T4, pl_rev);
+               break;
+       case CHELSIO_T5:
+               chip |= CHELSIO_CHIP_CODE(CHELSIO_T5, pl_rev);
+               break;
+       case CHELSIO_T6:
+               chip |= CHELSIO_CHIP_CODE(CHELSIO_T6, pl_rev);
+               break;
+       default:
+               dev_err(&pdev->dev, "Device %d is not supported\n",
+                       device_id);
+               return -EINVAL;
+       }
+       return chip;
+}
+
 static int init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
 {
        int func, i, err, s_qpp, qpp, num_seg;
@@ -4558,6 +4584,8 @@ static int init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
        bool highdma = false;
        struct adapter *adapter = NULL;
        void __iomem *regs;
+       u32 whoami, pl_rev;
+       enum chip_type chip;
 
        printk_once(KERN_INFO "%s - version %s\n", DRV_DESC, DRV_VERSION);
 
@@ -4586,7 +4614,11 @@ static int init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
                goto out_unmap_bar0;
 
        /* We control everything through one PF */
-       func = SOURCEPF_G(readl(regs + PL_WHOAMI_A));
+       whoami = readl(regs + PL_WHOAMI_A);
+       pl_rev = REV_G(readl(regs + PL_REV_A));
+       chip = get_chip_type(pdev, pl_rev);
+       func = CHELSIO_CHIP_VERSION(chip) <= CHELSIO_T5 ?
+               SOURCEPF_G(whoami) : T6_SOURCEPF_G(whoami);
        if (func != ent->driver_data) {
                iounmap(regs);
                pci_disable_device(pdev);
index b19329519dd535ebb6acf85d81aef80ca8f2b6e1..5c63ceb463d669702dba269d1f121200fc77040f 100644 (file)
@@ -3529,7 +3529,9 @@ int t4_slow_intr_handler(struct adapter *adapter)
 void t4_intr_enable(struct adapter *adapter)
 {
        u32 val = 0;
-       u32 pf = SOURCEPF_G(t4_read_reg(adapter, PL_WHOAMI_A));
+       u32 whoami = t4_read_reg(adapter, PL_WHOAMI_A);
+       u32 pf = CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5 ?
+                       SOURCEPF_G(whoami) : T6_SOURCEPF_G(whoami);
 
        if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5)
                val = ERR_DROPPED_DB_F | ERR_EGR_CTXT_PRIO_F | DBFIFO_HP_INT_F;
@@ -3554,7 +3556,9 @@ void t4_intr_enable(struct adapter *adapter)
  */
 void t4_intr_disable(struct adapter *adapter)
 {
-       u32 pf = SOURCEPF_G(t4_read_reg(adapter, PL_WHOAMI_A));
+       u32 whoami = t4_read_reg(adapter, PL_WHOAMI_A);
+       u32 pf = CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5 ?
+                       SOURCEPF_G(whoami) : T6_SOURCEPF_G(whoami);
 
        t4_write_reg(adapter, MYPF_REG(PL_PF_INT_ENABLE_A), 0);
        t4_set_reg_field(adapter, PL_INT_MAP0_A, 1 << pf, 0);
index 13ce018a79ad693d66da9a76ee6ce406025c48da..e444dc4ebbd8fd11ec177a3f7d90d9d8930b18fb 100644 (file)
 #define SOURCEPF_M    0x7U
 #define SOURCEPF_G(x) (((x) >> SOURCEPF_S) & SOURCEPF_M)
 
+#define T6_SOURCEPF_S    9
+#define T6_SOURCEPF_M    0x7U
+#define T6_SOURCEPF_G(x) (((x) >> T6_SOURCEPF_S) & T6_SOURCEPF_M)
+
 #define PL_INT_CAUSE_A 0x1940c
 
 #define ULP_TX_S    27
index 0db6dc9e9ed25f41273f9767ab470033be40ec5e..63dd5fdac5b91a5ba0186961a395d67f2c5cc7b2 100644 (file)
@@ -619,7 +619,8 @@ int t4vf_get_sge_params(struct adapter *adapter)
                 */
                whoami = t4_read_reg(adapter,
                                     T4VF_PL_BASE_ADDR + PL_VF_WHOAMI_A);
-               pf = SOURCEPF_G(whoami);
+               pf = CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5 ?
+                       SOURCEPF_G(whoami) : T6_SOURCEPF_G(whoami);
 
                s_hps = (HOSTPAGESIZEPF0_S +
                         (HOSTPAGESIZEPF1_S - HOSTPAGESIZEPF0_S) * pf);