drm/nouveau/mc/nv04: define reset masks + intr cleanup

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c
index 4896c98b51b1043f354d8ee8c5fc0cbe7171f360..a062624e906b3396f4b5b74c3da704be4b1a9765 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c
@@ -30,18 +30,13 @@ nv04_mc_reset[] = {
        {}
 };
 
-const struct nvkm_mc_map
+static const struct nvkm_mc_map
 nv04_mc_intr[] = {
-       { 0x00000001, NVKM_ENGINE_MPEG },       /* NV17- MPEG/ME */
-       { 0x00000100, NVKM_ENGINE_FIFO },
+       { 0x01010000, NVKM_ENGINE_DISP },
        { 0x00001000, NVKM_ENGINE_GR },
-       { 0x00010000, NVKM_ENGINE_DISP },
-       { 0x00020000, NVKM_ENGINE_VP }, /* NV40- */
-       { 0x00100000, NVKM_SUBDEV_TIMER },
-       { 0x01000000, NVKM_ENGINE_DISP },       /* NV04- PCRTC0 */
-       { 0x02000000, NVKM_ENGINE_DISP },       /* NV11- PCRTC1 */
+       { 0x00000100, NVKM_ENGINE_FIFO },
        { 0x10000000, NVKM_SUBDEV_BUS },
-       { 0x80000000, NVKM_ENGINE_SW },
+       { 0x00100000, NVKM_SUBDEV_TIMER },
        {}
 };
 
@@ -81,6 +76,7 @@ nv04_mc = {
        .intr_unarm = nv04_mc_intr_unarm,
        .intr_rearm = nv04_mc_intr_rearm,
        .intr_mask = nv04_mc_intr_mask,
+       .reset = nv04_mc_reset,
 };
 
 int

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/priv.h b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/priv.h
index 645638a9d53aef2cf11c8c69316cb55a03d50cbc..a1203811851238b462981a3d5e1a38717926ee33 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/priv.h
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/priv.h
@@ -25,7 +25,6 @@ struct nvkm_mc_func {
 };
 
 void nv04_mc_init(struct nvkm_mc *);
-extern const struct nvkm_mc_map nv04_mc_intr[];
 void nv04_mc_intr_unarm(struct nvkm_mc *);
 void nv04_mc_intr_rearm(struct nvkm_mc *);
 u32 nv04_mc_intr_mask(struct nvkm_mc *);