drm/radeon/kms/rs4xx: make sure crtcs are enabled when setting timing

based on ddx patch from Matthias Hopf.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
index df23d6a01d02297a8ee0832a9f800f48b4ea957c..88865e38fe30a100d2263f5a8db3c51b21a9445c 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
@@ -603,6 +603,10 @@ static bool radeon_set_crtc_timing(struct drm_crtc *crtc, struct drm_display_mod
                                      ? RADEON_CRTC2_INTERLACE_EN
                                      : 0));
 
+               /* rs4xx chips seem to like to have the crtc enabled when the timing is set */
+               if ((rdev->family == CHIP_RS400) || (rdev->family == CHIP_RS480))
+                       crtc2_gen_cntl |= RADEON_CRTC2_EN;
+
                disp2_merge_cntl = RREG32(RADEON_DISP2_MERGE_CNTL);
                disp2_merge_cntl &= ~RADEON_DISP2_RGB_OFFSET_EN;
 
@@ -630,6 +634,10 @@ static bool radeon_set_crtc_timing(struct drm_crtc *crtc, struct drm_display_mod
                                    ? RADEON_CRTC_INTERLACE_EN
                                    : 0));
 
+               /* rs4xx chips seem to like to have the crtc enabled when the timing is set */
+               if ((rdev->family == CHIP_RS400) || (rdev->family == CHIP_RS480))
+                       crtc_gen_cntl |= RADEON_CRTC_EN;
+
                crtc_ext_cntl = RREG32(RADEON_CRTC_EXT_CNTL);
                crtc_ext_cntl |= (RADEON_XCRT_CNT_EN |
                                  RADEON_CRTC_VSYNC_DIS |