MIPS: Alchemy: DB1200: Remove custom wait implementation

While playing with the out-of-tree MAE driver module, the system would
panic after a while in the db1200 custom wait code after wakeup due to
a clobbered k0 register being used as target address of a store op.

Remove the custom wait implementation and revert back to the Alchemy-
recommended implementation already set as default.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1092/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/alchemy/devboards/db1200/setup.c b/arch/mips/alchemy/devboards/db1200/setup.c
index 379536e3abd1f52d2543386a9d3c5e8cca6c602d..be7e92ea01f30f07e52b63c629d5b50a19799a72 100644 (file)
--- a/arch/mips/alchemy/devboards/db1200/setup.c
+++ b/arch/mips/alchemy/devboards/db1200/setup.c
@@ -60,43 +60,6 @@ void __init board_setup(void)
        wmb();
 }
 
-/* use the hexleds to count the number of times the cpu has entered
- * wait, the dots to indicate whether the CPU is currently idle or
- * active (dots off = sleeping, dots on = working) for cases where
- * the number doesn't change for a long(er) period of time.
- */
-static void db1200_wait(void)
-{
-       __asm__("       .set    push                    \n"
-               "       .set    mips3                   \n"
-               "       .set    noreorder               \n"
-               "       cache   0x14, 0(%0)             \n"
-               "       cache   0x14, 32(%0)            \n"
-               "       cache   0x14, 64(%0)            \n"
-               /* dots off: we're about to call wait */
-               "       lui     $26, 0xb980             \n"
-               "       ori     $27, $0, 3              \n"
-               "       sb      $27, 0x18($26)          \n"
-               "       sync                            \n"
-               "       nop                             \n"
-               "       wait                            \n"
-               "       nop                             \n"
-               "       nop                             \n"
-               "       nop                             \n"
-               "       nop                             \n"
-               "       nop                             \n"
-               /* dots on: there's work to do, increment cntr */
-               "       lui     $26, 0xb980             \n"
-               "       sb      $0, 0x18($26)           \n"
-               "       lui     $26, 0xb9c0             \n"
-               "       lb      $27, 0($26)             \n"
-               "       addiu   $27, $27, 1             \n"
-               "       sb      $27, 0($26)             \n"
-               "       sync                            \n"
-               "       .set    pop                     \n"
-               : : "r" (db1200_wait));
-}
-
 static int __init db1200_arch_init(void)
 {
        /* GPIO7 is low-level triggered CPLD cascade */
@@ -110,9 +73,6 @@ static int __init db1200_arch_init(void)
        irq_to_desc(DB1200_SD0_INSERT_INT)->status |= IRQ_NOAUTOEN;
        irq_to_desc(DB1200_SD0_EJECT_INT)->status |= IRQ_NOAUTOEN;
 
-       if (cpu_wait)
-               cpu_wait = db1200_wait;
-
        return 0;
 }
 arch_initcall(db1200_arch_init);