arm: mvebu: add L2 cache support
authorGregory CLEMENT <gregory.clement@free-electrons.com>
Wed, 26 Sep 2012 16:02:48 +0000 (18:02 +0200)
committerJason Cooper <jason@lakedaemon.net>
Tue, 27 Nov 2012 15:35:05 +0000 (15:35 +0000)
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-and-reviewed-by: Yehuda Yitschak <yehuday@marvell.com>
Tested-and-reviewed-by: Lior Amsalem <alior@marvell.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
arch/arm/mach-mvebu/Kconfig
arch/arm/mach-mvebu/irq-armada-370-xp.c

index c934e1d4933d7305292118380f8ea6730073c101..440b13ef1fedeecffd308f448dad7ae27cb8d4d7 100644 (file)
@@ -22,6 +22,7 @@ config MACH_ARMADA_370_XP
        bool
        select ARMADA_370_XP_TIMER
        select HAVE_SMP
+       select CACHE_L2X0
        select CPU_PJ4B
 
 config MACH_ARMADA_370
index 549b6846f94039e6c82c7f2307876ddecdd0cee1..8e3fb082c3c6e350232d3e91ffc8c4dc9c805643 100644 (file)
@@ -25,6 +25,7 @@
 #include <asm/mach/arch.h>
 #include <asm/exception.h>
 #include <asm/smp_plat.h>
+#include <asm/hardware/cache-l2x0.h>
 
 /* Interrupt Controller Registers Map */
 #define ARMADA_370_XP_INT_SET_MASK_OFFS                (0x48)
@@ -210,4 +211,7 @@ static const struct of_device_id mpic_of_match[] __initconst = {
 void __init armada_370_xp_init_irq(void)
 {
        of_irq_init(mpic_of_match);
+#ifdef CONFIG_CACHE_L2X0
+       l2x0_of_init(0, ~0UL);
+#endif
 }