[ARM] Fix Neponset IRQ handling
authorRussell King <rmk@dyn-67.arm.linux.org.uk>
Thu, 8 Jun 2006 16:59:31 +0000 (17:59 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Thu, 8 Jun 2006 16:59:31 +0000 (17:59 +0100)
While testing the genirq code on ARM, a condition was found whereby
the Neponset IRQ handler was being re-entered, causing the system
to deadlock.

Under the ARM IRQ code, this would not have been a visible problem
because the "simple" IRQ handling had no re-entrancy protection.

Resolve this by acknowledging the parent interrupt after we mask it
when we are going to handle one of our "special" level-based sources
(from ethernet or USAR chip.)

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mach-sa1100/neponset.c

index 9e02bc3712a00b5046245e71a13c1c99101bbcbc..af6d2775cf8237e34aecd21f8039083acbabc5db 100644 (file)
@@ -59,6 +59,14 @@ neponset_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *reg
                if (irr & (IRR_ETHERNET | IRR_USAR)) {
                        desc->chip->mask(irq);
 
+                       /*
+                        * Ack the interrupt now to prevent re-entering
+                        * this neponset handler.  Again, this is safe
+                        * since we'll check the IRR register prior to
+                        * leaving.
+                        */
+                       desc->chip->ack(irq);
+
                        if (irr & IRR_ETHERNET) {
                                d = irq_desc + IRQ_NEPONSET_SMC9196;
                                desc_handle_irq(IRQ_NEPONSET_SMC9196, d, regs);