brcm80211: fmac: add resetcore function for bcm4330 chip
authorFranky Lin <frankyl@broadcom.com>
Thu, 10 Nov 2011 19:30:24 +0000 (20:30 +0100)
committerJohn W. Linville <linville@tuxdriver.com>
Fri, 11 Nov 2011 19:28:37 +0000 (14:28 -0500)
This patch is part of the series of adding new backplane support

Reviewed-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: Franky Lin <frankyl@broadcom.com>
Signed-off-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c
drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.c
drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.h

index 0d0e283122624f4e6b927a4e770d12776222b39f..a5d1c35e9d939ffffdc7d93e1ec71a621cb7f61e 100644 (file)
@@ -3108,8 +3108,7 @@ static int brcmf_sdbrcm_download_state(struct brcmf_bus *bus, bool enter)
 
                ci->coredisable(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
 
-               brcmf_sdio_chip_resetcore(bus->sdiodev, ci,
-                                         BCMA_CORE_INTERNAL_MEM);
+               ci->resetcore(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM);
 
                /* Clear the top bit of memory */
                if (bus->ramsize) {
@@ -3133,7 +3132,7 @@ static int brcmf_sdbrcm_download_state(struct brcmf_bus *bus, bool enter)
                w_sdreg32(bus, 0xFFFFFFFF,
                          offsetof(struct sdpcmd_regs, intstatus), &retries);
 
-               brcmf_sdio_chip_resetcore(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
+               ci->resetcore(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
 
                /* Allow HT Clock now that the ARM is running. */
                bus->alp_only = false;
index d2cf8c6811d918f39c3d842fa893b1baa9d26a8e..cef9abb40a58f43168ad3f2632c1f0e8636937b2 100644 (file)
@@ -278,9 +278,9 @@ brcmf_sdio_ai_coredisable(struct brcmf_sdio_dev *sdiodev,
        udelay(1);
 }
 
-void
-brcmf_sdio_chip_resetcore(struct brcmf_sdio_dev *sdiodev,
-                         struct chip_info *ci, u16 coreid)
+static void
+brcmf_sdio_sb_resetcore(struct brcmf_sdio_dev *sdiodev,
+                       struct chip_info *ci, u16 coreid)
 {
        u32 regdata;
        u8 idx;
@@ -291,7 +291,7 @@ brcmf_sdio_chip_resetcore(struct brcmf_sdio_dev *sdiodev,
         * Must do the disable sequence first to work for
         * arbitrary current core state.
         */
-       ci->coredisable(sdiodev, ci, coreid);
+       brcmf_sdio_sb_coredisable(sdiodev, ci, coreid);
 
        /*
         * Now do the initialization sequence.
@@ -301,8 +301,11 @@ brcmf_sdio_chip_resetcore(struct brcmf_sdio_dev *sdiodev,
        brcmf_sdcard_reg_write(sdiodev,
                        CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 4,
                        SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET);
+       regdata = brcmf_sdcard_reg_read(sdiodev,
+                               CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 4);
        udelay(1);
 
+       /* clear any serror */
        regdata = brcmf_sdcard_reg_read(sdiodev,
                                CORE_SB(ci->c_inf[idx].base, sbtmstatehigh), 4);
        if (regdata & SSB_TMSHIGH_SERR)
@@ -320,12 +323,44 @@ brcmf_sdio_chip_resetcore(struct brcmf_sdio_dev *sdiodev,
        brcmf_sdcard_reg_write(sdiodev,
                CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 4,
                SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK);
+       regdata = brcmf_sdcard_reg_read(sdiodev,
+                               CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 4);
        udelay(1);
 
        /* leave clock enabled */
        brcmf_sdcard_reg_write(sdiodev,
                               CORE_SB(ci->c_inf[idx].base, sbtmstatelow),
                               4, SSB_TMSLOW_CLOCK);
+       regdata = brcmf_sdcard_reg_read(sdiodev,
+                               CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 4);
+       udelay(1);
+}
+
+static void
+brcmf_sdio_ai_resetcore(struct brcmf_sdio_dev *sdiodev,
+                       struct chip_info *ci, u16 coreid)
+{
+       u8 idx;
+       u32 regdata;
+
+       idx = brcmf_sdio_chip_getinfidx(ci, coreid);
+
+       /* must disable first to work for arbitrary current core state */
+       brcmf_sdio_ai_coredisable(sdiodev, ci, coreid);
+
+       /* now do initialization sequence */
+       brcmf_sdcard_reg_write(sdiodev, ci->c_inf[idx].wrapbase+BCMA_IOCTL,
+                              4, BCMA_IOCTL_FGC | BCMA_IOCTL_CLK);
+       regdata = brcmf_sdcard_reg_read(sdiodev,
+                                       ci->c_inf[idx].wrapbase+BCMA_IOCTL, 4);
+       brcmf_sdcard_reg_write(sdiodev, ci->c_inf[idx].wrapbase+BCMA_RESET_CTL,
+                              4, 0);
+       udelay(1);
+
+       brcmf_sdcard_reg_write(sdiodev, ci->c_inf[idx].wrapbase+BCMA_IOCTL,
+                              4, BCMA_IOCTL_CLK);
+       regdata = brcmf_sdcard_reg_read(sdiodev,
+                                       ci->c_inf[idx].wrapbase+BCMA_IOCTL, 4);
        udelay(1);
 }
 
@@ -371,11 +406,13 @@ static int brcmf_sdio_chip_recognition(struct brcmf_sdio_dev *sdiodev,
                ci->iscoreup = brcmf_sdio_sb_iscoreup;
                ci->corerev = brcmf_sdio_sb_corerev;
                ci->coredisable = brcmf_sdio_sb_coredisable;
+               ci->resetcore = brcmf_sdio_sb_resetcore;
                break;
        case SOCI_AI:
                ci->iscoreup = brcmf_sdio_ai_iscoreup;
                ci->corerev = brcmf_sdio_ai_corerev;
                ci->coredisable = brcmf_sdio_ai_coredisable;
+               ci->resetcore = brcmf_sdio_ai_resetcore;
                break;
        default:
                brcmf_dbg(ERROR, "socitype %u not supported\n", ci->socitype);
index 22232a8804bd531872076f8a77cd0d4c03c65558..ce974d76bd92c55132842f82dea5368b4807dd2b 100644 (file)
@@ -80,6 +80,8 @@ struct chip_info {
                         u16 coreid);
        void (*coredisable)(struct brcmf_sdio_dev *sdiodev,
                        struct chip_info *ci, u16 coreid);
+       void (*resetcore)(struct brcmf_sdio_dev *sdiodev,
+                       struct chip_info *ci, u16 coreid);
 };
 
 struct sbconfig {
@@ -122,8 +124,6 @@ struct sbconfig {
        u32 sbidhigh;   /* identification */
 };
 
-extern void brcmf_sdio_chip_resetcore(struct brcmf_sdio_dev *sdiodev,
-                                     struct chip_info *ci, u16 coreid);
 extern int brcmf_sdio_chip_attach(struct brcmf_sdio_dev *sdiodev,
                                  struct chip_info **ci_ptr, u32 regs);
 extern void brcmf_sdio_chip_detach(struct chip_info **ci_ptr);